IP Library › Granted Patent US 11,151,064
Granted Patent B2
US 11,151,064 · App. 16/783,988 · Granted Oct 19, 2021

Information processing apparatus and storage device access control method

Inventor: Hideki Yoshida (Yokohama Kanagawa, JP)
Assignee: KIOXIA CORPORATION
G06F13/1668G06F13/4282G06F2213/0026
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Quick Facts
Patent No.
US 11,151,064
App. No.
16/783,988
Granted
Oct 19, 2021
Kind
B2
Abstract

A computing device includes a memory and a processor connected to the memory and configured to: create, in a first memory space of the memory, a first I/O submission queue associated with a first application running in user space; create, in a second memory space of the memory, a second I/O submission queue associated with a second application running in user space; in response to a first I/O request from the first application, store the first I/O request in the first I/O submission queue for access by the semiconductor storage device; and in response to a second I/O request from the second application, store the second I/O request in the second I/O submission queue for access by the semiconductor storage device.

Claims (77)

1. A computing device, comprising:

a memory; and

a processor connected to the memory and configured to:

create, in a first memory space of the memory, a first I/O submission queue associated with a first application running in user space;

create, in a second memory space of the memory, a second I/O submission queue associated with a second application running in user space;

in response to a first I/O request from the first application, store the first I/O request in the first I/O submission queue for access by a semiconductor storage device;

in response to a second I/O request from the second application, store the second I/O request in the second I/O submission queue for access by the semiconductor storage device;

create, in a third memory space of the memory, a management request submission queue;

in response to a first I/O queue creation request from the first application, store the first I/O queue creation request in the management request submission queue, the first I/O creation request instructing creation of the first I/O submission queue and a first I/O completion queue associated with the first application; and

in response to a second I/O queue creation request from the second application, store the second I/O queue creation request in the management request submission queue, the second I/O creation request instructing creation of the second I/O submission queue and a second I/O completion queue associated with the second application.

2. The computing device according to claim 1 , wherein the processor is further configured to:

create, in a fourth memory space of the memory, a fourth I/O submission queue; and

in response to a fourth I/O request from a software module running in kernel space, store the fourth I/O request in the fourth I/O submission queue for access by the semiconductor storage device.

3. The computing device according to claim 1 , wherein the first I/O submission queue is not accessible by the second application, and the second I/O submission queue is not accessible by the first application.

4. The computing device according to claim 1 , wherein

the first application is running in a first virtual machine that is running in user space, and

the second application is running in a second virtual machine that is running in user space.

5. The computing device according to claim 1 , wherein the processor is further configured to:

create, in the first memory space, a first I/O completion queue associated with the first application; and

create, in the second memory space, a second I/O completion queue associated with the second application.

6. The computing device according to claim 1 , wherein

the first I/O submission queue is associated with the first application and a first namespace, and the first I/O request is associated with the first namespace, and

the processor is further configured to:

create, in the first memory space, a third I/O submission queue associated with the first application and a second namespace; and

in response to a third I/O request from the first application and associated with the second namespace, store the third I/O request in the third I/O submission queue for access by the semiconductor storage device.

7. The computing device according to claim 6 , wherein

no I/O request associated with the second namespace is added to the first I/O submission queue, and

no I/O request associated with the first namespace is added to the second I/O submission queue.

8. The computing device according to claim 6 , wherein the processor is further configured to:

create, in the first memory space, a first I/O completion queue associated with the first application; and

create, in the second memory space, a second I/O completion queue associated with the second application.

9. The computing device according to claim 1 , wherein the processor is further configured to:

in response to the first I/O request being added to the first I/O submission queue, notify the semiconductor storage device that the first I/O request has been stored in the first I/O submission queue; and

in response to the second I/O request being added to the second I/O submission queue, notify the semiconductor storage device that the second I/O request has been stored in the second I/O submission queue.

10. A method for controlling access to a semiconductor storage device from applications running in user space of a computer system, the method comprising:

creating, in a first memory space, a first I/O submission queue for a first application running in user space;

creating, in a second memory space of the memory, a second I/O submission queue associated with a second application running in user space;

in response to a first I/O request from the first application, storing the first I/O request in the first I/O submission queue for access by the semiconductor storage device;

in response to a second I/O request from the second application, storing the second I/O request in the second I/O submission queue for access by the semiconductor storage device;

creating, in a third memory space of the memory, a management request submission queue;

in response to a first I/O queue creation request from the first application, storing the first I/O queue creation request in the management request submission queue, the first I/O queue creation request instructing creation of the first I/O submission queue and a first I/O completion queue associated with the first application; and

in response to a second I/O queue creation request from the second application, storing the second I/O queue creation request in the management request submission queue, the second I/O queue creation request instructing creation of the second I/O submission queue and a second I/O completion queue associated with the second application.

11. The computing device according to claim 10 , further comprising:

creating, in a fourth memory space of the memory, a fourth I/O submission queue; and

in response to a fourth I/O request from a software module running in kernel space, storing the fourth I/O request in the fourth I/O submission queue for access by the semiconductor storage device.

12. The method according to claim 10 , wherein the first I/O submission queue is not accessible by the second application, and the second I/O submission queue is not accessible by the first application.

13. The method according to claim 10 , wherein

the first application is running in a first virtual machine in user space, and

the second application is running in a second virtual machine in user space.

14. The method according to claim 10 , further comprising:

creating, in the first memory space, a first I/O completion queue associated with the first application; and

creating, in the second memory space, a second I/O completion queue associated with the second application.

15. The method according to claim 10 , wherein

the first I/O submission queue is associated with the first application and a first namespace, and the first I/O request is associated with the first namespace, and the method further comprises:

creating, in the first memory space, a third I/O submission queue associated with the first application and a second namespace; and

in response to a third I/O request from the first application and associated with the second namespace, storing the third I/O request in the third I/O submission queue for access by the semiconductor storage device.

16. The method according to claim 15 , wherein

no I/O request associated with the second namespace is added to the first I/O submission queue, and

no I/O request associated with the first namespace is added to the second I/O submission queue.

17. The method according to claim 15 , further comprising:

creating, in the first memory space, a first I/O completion queue associated with the first application, a first I/O completion response from the semiconductor storage device being stored in the first I/O completion queue upon completion of the first I/O request; and

creating, in the second memory space, a second I/O completion queue associated with the second application, a second I/O completion response from the semiconductor storage device being stored in the second I/O completion queue upon completion of the second I/O request and a third I/O completion response from the semiconductor storage device being stored in the second I/O completion queue upon completion of the third I/O request.

18. The method according to claim 10 , further comprising:

in response to the first I/O request being added to the first I/O submission queue, notifying the semiconductor storage device that the first I/O request has been stored in the first I/O submission queue; and

in response to the second I/O request being added to the second I/O submission queue, notifying the semiconductor storage device that the second I/O request has been stored in the second I/O submission queue.

19. A computing device, comprising:

a memory; and

a processor connected to the memory and configured to:

create, in a first memory space of the memory, a first I/O submission queue associated with a first application running in user space and a first namespace;

create, in a second memory space of the memory, a second I/O submission queue associated with a second application running in user space;

create, in the first memory space, a third I/O submission queue associated with the first application and a second namespace;

in response to a first I/O request associated with the first namespace from the first application, store the first I/O request in the first I/O submission queue for access by a semiconductor storage device;

in response to a second I/O request from the second application, store the second I/O request in the second I/O submission queue for access by the semiconductor storage device; and

in response to a third I/O request associated with the second namespace from the first application, store the third I/O request in the third I/O submission queue for access by the semiconductor storage device.

20. The computing device according to claim 19 , wherein

no I/O request associated with the second namespace is added to the first I/O submission queue, and

no I/O request associated with the first namespace is added to the second I/O submission queue.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE POSTAL CODE FROM 105-0023 TO 108-0023 PREVIOUSLY RECORDED ON REEL 051745 FRAME 0362. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 2, 2020
From: YOSHIDA, HIDEKI
To: KIOXIA CORPORATION
Reel/Frame 052066/0814 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2020
From: YOSHIDA, HIDEKI
To: KIOXIA CORPORATION
Reel/Frame 051745/0362 →
Priority Claims (1)
JP JP2019-147496 · Aug 9, 2019 · national
Continuity (1)
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