Integrated circuit device and a method of manufacturing the same
An integrated circuit device includes: a substrate including a fin type active region extending in a first direction; a gate structure intersecting the fin type active region and extending in a second direction perpendicular to the first direction; a source/drain region on sides of the gate structure; a gate isolation insulating layer contacting an end of the gate structure; a first contact connected to the source/drain region; and a second contact connected to the source/drain region, the second contact being longer in the second direction than the first contact, the second contact includes a first portion extending in the second direction from an area adjacent to one side of the gate structure beyond the end of the gate structure and facing a sidewall of the gate structure, and a second portion facing a sidewall of the gate isolation insulating layer, and the first portion is wider than the second portion.
1. An integrated circuit device, comprising:
a substrate comprising a fin type active region extending in a first direction;
a gate structure intersecting the fin type active region on the substrate and extending in a second direction perpendicular to the first direction;
a source/drain region arranged on both sides of the gate structure;
a gate isolation insulating layer in contact with an end of the gate structure;
a first contact connected to the source/drain region; and
a second contact connected to the source/drain region, the second contact having a longer length in the second direction than the first contact,
wherein the second contact comprises a first portion extending in the second direction from an area adjacent to one side of the gate structure beyond the end of the gate structure and facing a sidewall of the gate structure, and
a second portion facing a sidewall of the gate isolation insulating layer, and
wherein a first width in the first direction of the first portion is greater than a second width in the first direction of the second portion.
2. The integrated circuit device of claim 1 , wherein, in the first direction, a third width of the first portion, which is adjacent to the end of the gate structure, is substantially equal to the second width.
3. The integrated circuit device of claim 1 , wherein the second portion of the second contact crosses the gate isolation insulating layer.
4. The integrated circuit device of claim 1 , wherein the first contact does not cross the gate isolation insulating layer, and
a width in the first direction of the first contact is substantially equal to the first width of the first portion.
5. The integrated circuit device of claim 1 , wherein the gate structure comprises:
a gate electrode intersecting the fin active region on the substrate and extending in the second direction;
a gate capping layer extending in the second direction on the gate electrode; and
a gate spacer arranged on both sidewalls of the gate electrode and the gate capping layer.
6. The integrated circuit device of claim 5 , wherein a shortest distance between the gate electrode at the end of the gate structure and the first portion of the second contact is greater than a shortest distance between the gate electrode at a center region of the gate structure and the first portion of the second contact.
7. The integrated circuit device of claim 1 , wherein the first contact and the second contact are tapered in a third direction perpendicular to a top surface of the substrate.
8. The integrated circuit device of claim 1 , wherein the first contact and the second contact are active contacts, and
the integrated circuit device further comprises a gate contact arranged on the gate structure.
9. The integrated circuit device of claim 1 , wherein a width in the first direction of a third portion connecting the first portion to the second portion of the second contact narrows as the third portion approaches the second portion.
10. The integrated circuit device of claim 1 , wherein, in a plan view, an edge of the first portion of the second contact is rounded.
11. An integrated circuit device, comprising:
a substrate comprising a fin type active region extending in a first direction;
a gate structure intersecting the fin type active region on the substrate and extending in a second direction perpendicular to the first direction;
a source/drain region arranged on both sides of the gate structure;
a gate isolation insulating layer in contact with an end of the gate structure;
a first contact connected to the source/drain region and not crossing the gate isolation insulating layer; and
a second contact connected to the source/drain region and extending in the second direction while crossing the gate isolation insulating layer,
wherein a width in the first direction of the first contact is greater than a width in the first direction of the second contact.
12. The integrated circuit device of claim 11 , wherein the second contact comprises:
a first portion facing a sidewall of the gate structure; and
a second portion facing a sidewall of the gate isolation insulating layer, and
wherein a first width in the first direction of the first portion is substantially equal to a second width in the first direction of the second portion.
13. The integrated circuit device of claim 11 , wherein a length in the second direction of the first contact is less than a length in the second direction of the second contact.
14. The integrated circuit device of claim 11 , wherein the first contact and the second contact are active contacts, and
the integrated circuit device further comprises a gate contact arranged on the gate structure.
15. The integrated circuit device of claim 11 , wherein
the second contact has a bar shape tapered in a third direction perpendicular to a top surface of the substrate.
16. An integrated circuit device, comprising:
a substrate comprising a fin type active region extending in a first direction;
a plurality of gate structures intersecting the fin type active region on the substrate and extending in a second direction perpendicular to the first direction and parallel to a top surface of the substrate;
source/drain regions arranged between the plurality of the gate structures;
a gate isolation insulating layer extending in the first direction on the substrate and in contact with at least one end of the plurality of gate structures;
a first active contact connected to a first one of the source/drain regions; and
a second active contact connected to a second one of the source/drain regions and extending in the second direction from between a first pair of neighboring gate structures to between a second pair of neighboring gate structures while crossing the gate isolation insulating layer,
wherein the second active contact comprises:
a first portion arranged between the first pair or second pair of neighboring gate structures; and
a second portion in contact with the gate isolation insulating layer, and
wherein a width in the first direction of the first portion is greater than a width in the first direction of the second portion.
17. The integrated circuit device of claim 16 , wherein in a side view, the second active contact is tapered in a third direction perpendicular to a top surface of the substrate, and
in a plan view, an edge of the first portion of the second active contact is rounded.
18. The integrated circuit device of claim 16 , wherein a width in the first direction of the first active contact is substantially equal to the width in the first direction of the first portion, and
a length in the second direction of the first active contact is less than a length in the second direction of the second active contact.
19. The integrated circuit device of claim 16 , wherein the plurality of gate structures form a plurality of gate lines,
the gate isolation insulating layer is formed in a gate cut region, and
the plurality of gate lines are collinear with the gate cut region interposed therebetween.
20. The integrated circuit device of claim 19 , wherein the second active contact penetrates the gate cut region and is between the plurality of gate lines.