Semiconductor device, method of making a semiconductor device, and processing system
The present disclosure generally relates to methods for forming a semiconductor device, a semiconductor device, and a processing chamber. The method includes forming a source/drain region in a processing system, forming a doped semiconductor layer on the source/drain region in the processing system, forming a metal silicide layer, forming a dielectric material, forming a trench in the dielectric material, and filling the trench with a conductor. The source/drain region, the doped semiconductor layer, and the metal silicide layer are formed without breaking vacuum. A semiconductor device includes a plurality of layers, and the semiconductor device has reduced contact resistance. A processing system is configured to perform the method and form the semiconductor device. Embodiments of the present disclosure enable formation of a source/drain contact with reduced contact resistance by using integrated processes, which allows various operations of the source/drain contact formation to be performed within the same processing system.
1. A method for forming a semiconductor device, the method comprising:
forming a source/drain region on a substrate;
forming a doped semiconductor layer on the source/drain region;
forming a metal silicide layer on the doped semiconductor layer in a processing system, wherein the source/drain region, the doped semiconductor layer, and the metal silicide layer are formed without breaking vacuum;
forming a dielectric material over the metal silicide layer;
forming a trench in the dielectric material to expose a portion of the metal silicide layer; and
filling the trench with a conductor.
2. The method of claim 1 , wherein the method is performed in a single processing system.
3. The method of claim 1 , further comprising performing a pre-clean process prior to forming the source/drain region.
4. The method of claim 1 , wherein the doped semiconductor layer wraps around the source/drain region.
5. The method of claim 1 , wherein the metal silicide layer wraps around the source/drain region.
6. The method of claim 1 , further comprising forming a contact etch stop layer over the metal silicide layer, wherein the dielectric material is formed on the contact etch stop layer.
7. A processing system comprising:
a transfer chamber;
a plurality of process chambers coupled to the transfer chamber; and
a controller configured to cause a process to be performed in the processing system that includes:
forming a source/drain region;
forming a doped semiconductor layer on the source/drain region; and
forming a metal silicide layer on the doped semiconductor layer, wherein the source/drain region, the doped semiconductor layer, and the metal silicide layer are formed without breaking vacuum.
8. The processing system of claim 7 , wherein the process further comprises forming a dielectric material over the metal silicide layer, forming a trench in the dielectric material to expose a portion of the metal silicide layer, and filling the trench with a conductor.
9. The processing system of claim 8 , wherein the process further comprises forming a cap layer on the metal silicide layer, wherein the cap layer comprises a dielectric material.
10. The processing system of claim 8 , wherein the process further comprises forming a contact etch stop layer over the metal silicide layer, wherein the dielectric material is formed on the contact etch stop layer.
11. The processing system of claim 7 , further comprising a pre-clean chamber.