IP Library › Granted Patent US 11,157,677
Granted Patent B2
US 11,157,677 · App. 16/698,308 · Granted Oct 26, 2021

Merged pillar structures and method of generating layout diagram of same

Inventors: Hiranmay Biswas (Kolkata, IN); Chung-Hsing Wang (Baoshan Township, TW); Kuo-Nan Yang (Hsinchu, TW); Yi-Kan Cheng (Taipei, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
G06F30/394G06F30/398H01L27/0207G06F2119/06H01L27/11807
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Quick Facts
Patent No.
US 11,157,677
App. No.
16/698,308
Granted
Oct 26, 2021
Kind
B2
Abstract

A method of a layout diagram (of a conductive line structure for an IC) including: for a first set of pillar patterns included in an initial layout diagram that represents portions of an M(i) layer of metallization and where i is a non-negative number, the first set including first and second pillar patterns which are non-overlapping of each other, which have long axes that are substantially collinear with a reference line, and which have a first distance of separation, determining a first distance of separation as between corresponding immediately adjacent members of the first set; recognizing that the first distance is less than a transverse routing (TVR) separation threshold for an M(i+j) layer of metallization, where j is an integer and j≥2; and increasing the first distance so as to become a second distance which is greater than the TVR separation threshold of the M(i+j) layer.

Claims (101)

1. A conductive line structure in an integrated circuit (IC) and arranged relative to a grid which has alpha and beta tracks that are substantially parallel to corresponding orthogonal alpha and beta directions, the conductive line structure comprising:

a first set of medium pillars having long axes substantially coaxial with corresponding ones of the alpha tracks;

a second set of short pillars having long axes substantially parallel with corresponding ones of the beta tracks; and

vias which electrically connect the first set of medium pillars with corresponding members of the second set of short pillars; and

wherein:

the first set of medium pillars:

represents portions of an M(i) layer of metallization, where i is a non-negative integer, and

includes pairings of first & second and third & fourth medium pillars which are non-overlapping of each other relative to the alpha direction, and have a first distance of alpha-direction-separation therebetween; and

members of the second set of short pillars:

represent corresponding portions of an M(i+1) layer of metallization;

are non-overlapping of each other; and

are overlapping of corresponding pairings of the first & third and second & fourth medium pillars; and

the first distance is greater than a minimum transverse-routing (TVR) separation threshold for an M(i+j) layer of metallization, where j is an integer and j≥2.

2. The conductive line structure of claim 1 , wherein:

the first distance is represented by a variable S3;

a process-node by which the conductive line structure was manufactured has a minimum end-of-line spacing, S EOL ; and

the first distance S3 has a range such that

≈(7/3)* S EOL ≤S 3≤≈3* S EOL .

3. The conductive line structure of claim 1 , wherein:

the first set of medium pillars represents portions of metallization of a power grid.

4. The conductive line structure of claim 1 , wherein:

the first distance is greater than a minimum TVR separation threshold for an M(i+j+k) layer of metallization, where k is an integer and j≥2.

5. The conductive line structure claim 4 , wherein:

the first distance is represented by a variable S4;

a process-node by which the conductive line structure was manufactured has a minimum end-of-line spacing, S EOL ; and

the first distance S4 has a range such that

≈(13/3)* S EOL ≤S 4≤≈5* S EOL .

6. The conductive line structure of claim 1 , wherein:

relative to the alpha direction, each medium pillar of the first set has a length which is less than Blech length.

7. A conductive line structure in an integrated circuit (IC), the conductive line structure comprising:

a first set of medium pillars having long axes extending in an alpha direction;

a second set of short pillars extending in a beta direction, the beta direction being substantially perpendicular to the alpha direction; and

vias which electrically connect the first set of medium pillars with corresponding members of the second set of short pillars; and

wherein:

the first set of medium pillars represents portions of an M(i) layer of metallization, where i is a non-negative integer, the first set including, relative to the alpha direction, a first pair of first & second medium pillars and a second pair of third & fourth medium pillars, member medium pillars of each of the first and second pairs being non-overlapping of each other relative to the alpha direction, and being separated by a first distance in the alpha direction; and

the second set of short pillars represents portions of an M(i+1) layer of metallization, members of the second set being:

non-overlapping of each other; and

overlapping of corresponding first and second dyads, the first and second dyads being arranged relative to the alpha direction, the first dyad including the first & third medium pillars, the second dyad including the second & fourth medium pillars; and

the first distance is greater than a minimum transverse-routing (TVR) separation threshold for an M(i+j) layer of metallization, where j is an integer and j≥2; and

relative to the beta direction, the first pair and the second pair are separated by a second distance.

8. The conductive line structure of claim 7 , wherein:

relative to the alpha direction, each medium pillar of the first set has a length which is less than Blech length.

9. The conductive line structure of claim 7 , further comprising:

a third set of medium pillars extending in the alpha direction;

a fourth set of short pillars extending in the beta direction; and

vias which electrically connect the third set of medium pillars with corresponding members of the second set of short pillars;

wherein:

the third set of medium pillars represents portions of the M(i) layer, and

includes a third pair of fifth & sixth medium pillars and a fourth pair of seventh & eighth medium pillars, member medium pillars of each of the third and fourth pairs being non-overlapping of each other relative to the alpha direction, and being separated by the first distance of in the alpha direction; and

the fourth set of short pillars represents portions of the M(i+1) layer of metallization; members of the fourth set being:

non-overlapping of each other; and

overlapping of corresponding third and fourth dyads, the third and fourth dyads being arranged relative to the alpha direction, the third dyad including the fifth & seventh medium pillars, the fourth dyad including the sixth & eighth medium pillars.

10. The conductive line structure of claim 9 , wherein:

relative to the alpha direction, each medium pillar of each of the first set and the third set has a length which is less than Blech length.

11. The conductive line structure of claim 9 , wherein:

relative to the beta direction, each medium pillar of the third set does not overlap a medium pillar of the first set.

12. The conductive line structure of claim 9 , wherein:

relative to the beta direction:

the third dyad is interleaved with the first dyad; and

the second dyad is interleaved with the fourth dyad.

13. The conductive line structure of claim 12 , wherein:

relative to the beta direction:

the fifth medium pillar is located asymmetrically between the first & third medium pillars; and

the fifth medium pillar is located asymmetrically between the second & fourth medium pillars.

14. The conductive line structure of claim 9 , wherein:

the conductive line structure is arranged relative to a grid which has alpha and beta tracks that are substantially parallel correspondingly to the alpha and beta directions; and

relative to the beta direction, members of each dyad have an intra-dyad pitch of about 3 alpha tracks.

15. The conductive line structure of claim 9 , wherein:

the conductive line structure is arranged relative to a grid which has alpha and beta tracks that are substantially parallel correspondingly to the alpha and beta directions; and

relative to the beta direction, dyads have an inter-dyad pitch of about 10 alpha tracks.

16. The conductive line structure of claim 9 , wherein:

the first, second, third & fourth medium pillars are configured to provide a first reference voltage; and

the fifth, sixth, seventh & eighth medium pillars are configured to provide a second reference voltage; and

the second reference voltage is different than the first reference voltage.

17. The conductive line structure of claim 16 , wherein:

the first reference voltage is VDD; and

the second reference voltage is VSS.

18. The conductive line structure of claim 7 , wherein:

the conductive line structure is arranged relative to a grid which has alpha and beta tracks that are substantially parallel correspondingly to the alpha and beta directions; and

relative to the beta direction, members of each dyad have an intra-dyad pitch of about 3 alpha tracks.

19. A conductive line structure in an integrated circuit (IC), the conductive line structure comprising:

a first set of medium pillars having long axes extending in an alpha direction;

a second set of short pillars extending in a beta direction, the beta direction being substantially perpendicular to the alpha direction; and

vias which electrically connect the first set of medium pillars with corresponding members of the second set of short pillars; and

wherein:

the first set of medium pillars represents portions of an M(i) layer of metallization, where i is a non-negative integer, the first set including, relative to the alpha direction, a first pair of first & second medium pillars and a second pair of third & fourth medium pillars, member medium pillars of each of the first and second pairs being non-overlapping of each other relative to the alpha direction, and being separated by a first distance in the alpha direction; and

the second set of short pillars represents portions of an M(i+1) layer of metallization, members of the second set being:

non-overlapping of each other; and

overlapping of corresponding first and second dyads, the first and second dyads being arranged relative to the alpha direction, the first dyad including the first & third medium pillars, the second dyad including the second & fourth medium pillars; and

the first distance is greater than a minimum transverse-routing (TVR) separation threshold for an M(i+j) layer of metallization, where j is an integer and j≥2;

relative to the alpha direction, each medium pillar of the first set has a length which is less than Blech length; and

relative to the beta direction, the first pair and the second pair are separated by a second distance.

20. The conductive line structure of claim 19 , further comprising:

a third set of medium pillars extending in the alpha direction;

a fourth set of short pillars extending in the beta direction; and

vias which electrically connect the third set of medium pillars with corresponding members of the second set of short pillars; and

wherein:

the third set of medium pillars represents portions of the M(i) layer, and includes a third pair of fifth & sixth medium pillars and a fourth pair of seventh & eighth medium pillars, member medium pillars of each of the third and fourth pairs being non-overlapping of each other relative to the alpha direction, and being separated by the first distance of in the alpha direction; and

the fourth set of short pillars represents portions of the M(i+1) layer of metallization; members of the fourth set being:

non-overlapping of each other; and

overlapping of corresponding third and fourth dyads, the third and fourth dyads being arranged relative to the alpha direction, the third dyad including the fifth & seventh medium pillars, the fourth dyad including the sixth & eighth medium pillars.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2019
From: BISWAS, HIRANMAY; WANG, CHUNG-HSING; YANG, KUO-NAN; CHENG, YI-KAN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 051143/0923 →
Continuity (3)
Continuation 15882188 · Jan 29, 2018
Provisional Application 62552377 · Aug 30, 2017
Related Publication 20200175220A1 · Jun 4, 2020