Backside PN junction diode
The present disclosure provides embodiments of semiconductor devices. A semiconductor device according to the present disclosure include an elongated semiconductor member surrounded by an isolation feature and extending lengthwise along a first direction, a first source/drain feature and a second source/drain feature over a top surface of the elongated semiconductor member, a vertical stack of channel members each extending lengthwise between the first source/drain feature and the second source/drain feature along the first direction, a gate structure wrapping around each of the channel members, an epitaxial layer deposited on the bottom surface of the elongated semiconductor member, a silicide layer disposed on the epitaxial layer, and a conductive layer disposed on the silicide layer.
1. A semiconductor device, comprising:
an elongated semiconductor member surrounded by an isolation feature and extending lengthwise along a first direction, the elongated semiconductor member including a top surface and an opposing bottom surface;
a first source/drain feature and a second source/drain feature over the top surface of the elongated semiconductor member;
a vertical stack of channel members each extending lengthwise between the first source/drain feature and the second source/drain feature along the first direction;
a gate structure wrapping around each of the vertical stack of channel members;
a silicide layer underlying the elongated semiconductor member; and
a conductive layer disposed on the silicide layer.
2. The semiconductor device of claim 1 , further comprising:
an epitaxial layer disposed between the elongated semiconductor member and the silicide layer.
3. The semiconductor device of claim 2 ,
wherein the elongated semiconductor member and the epitaxial layer are doped with the same type of dopant,
wherein a doping concentration of the epitaxial layer is greater than a doping concentration of the elongated semiconductor member.
4. The semiconductor device of claim 1 ,
wherein the elongated semiconductor member is doped by at least one dopant of a first type,
wherein the first source/drain feature is doped by at least one dopant of a second type,
wherein the second source/drain feature is doped by at least one dopant of a third type,
wherein the first type is different from at least one of the second type and the third type.
5. The semiconductor device of claim 4 , wherein the second type is different from the third type.
6. The semiconductor device of claim 4 , wherein the second type is the same as the third type.
7. The semiconductor device of claim 1 , wherein the gate structure is electrically floating.
8. The semiconductor device of claim 7 , wherein the first source/drain feature is resistively coupled to the second source/drain feature.
9. The semiconductor device of claim 7 , wherein the first source/drain feature is resistively coupled to the conductive layer.
10. A semiconductor device, comprising:
a well region extending lengthwise along a direction and being disposed in an isolation feature;
a first source/drain feature and a second source/drain feature over the well region;
a vertical stack of channel members each extending lengthwise between the first source/drain feature and the second source/drain feature along the direction;
a gate structure wrapping around each of the vertical stack of channel members;
an epitaxial layer below the well region;
a silicide layer below and in contact with the epitaxial layer; and
a conductive layer below and in contact with the silicide layer.
11. The semiconductor device of claim 10 , wherein the gate structure is electrically floating.
12. The semiconductor device of claim 11 , wherein the first source/drain feature is resistively coupled to the second source/drain feature.
13. The semiconductor device of claim 12 , wherein the first source/drain feature and the second source/drain feature are doped with a first type dopant.
14. The semiconductor device of claim 13 , wherein the well region is doped with a second type dopant different from the first type dopant.
15. The semiconductor device of claim 11 , wherein the first source/drain feature is resistively coupled to the conductive layer.
16. The semiconductor device of claim 15 ,
wherein the first source/drain feature is doped with a first type dopant,
wherein the second source/drain feature is doped with a second type dopant different from the first type dopant.
17. A semiconductor device, comprising:
a transistor comprising:
a first conductive layer,
a dielectric layer over the first conductive layer,
a backside contact via extending through the dielectric layer,
a silicide feature disposed on the backside contact via,
a source feature disposed on and in contact with the silicide feature,
a drain feature disposed on the dielectric layer and insulated from the first conductive layer,
a first plurality of channel members each extending lengthwise between the source feature and the drain feature, and
a first gate structure wrapping around each of the channel members and extending lengthwise along a first direction; and
a PN junction diode structure comprising:
a second conductive layer,
a silicide layer disposed on the second conductive layer,
an epitaxial layer disposed on the silicide layer,
an elongated semiconductor member disposed on the epitaxial layer and extending lengthwise along a second direction perpendicular to the first direction,
a first source/drain feature and a second source/drain feature over the elongated semiconductor member,
a second plurality of channel members each extending lengthwise between the first source/drain feature and the second source/drain feature, and
a second gate structure wrapping around each of the channel members and extending lengthwise along the first direction.
18. The semiconductor device of claim 17 ,
wherein the elongated semiconductor member and the epitaxial layer are doped with the same type of dopant,
wherein a doping concentration of the epitaxial layer is greater than a doping concentration of the elongated semiconductor member.
19. The semiconductor device of claim 17 , wherein the first source/drain feature is resistively coupled to the second conductive layer.
20. The semiconductor device of claim 17 , wherein the second gate structure is electrically floating.