Semiconductor image sensor
The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip has an image sensor within a substrate. A first dielectric has an upper surface that extends over a first side of the substrate and over one or more trenches within the first side of the substrate. The one or more trenches laterally surround the image sensor. An internal reflection structure arranged over the upper surface of the first dielectric. The internal reflection structure is configured to reflect radiation exiting from the substrate back into the substrate.
1. An integrated chip, comprising:
an image sensor within a substrate;
a first dielectric having an upper surface extending over a first surface of the substrate and over one or more trenches within the first surface of the substrate, wherein the one or more trenches laterally surround the image sensor; and
a reflective structure arranged over the upper surface of the first dielectric, wherein the reflective structure is configured to reflect radiation exiting from the substrate back into the substrate,
wherein the substrate comprises internal surfaces defining one or more recesses disposed over the image sensor, and
wherein the reflective structure partially laterally overlaps the one or more recesses.
2. The integrated chip of claim 1 , wherein the reflective structure comprises a bottom surface facing the substrate and a top surface facing away from the substrate, the bottom surface having a greater width than the top surface.
3. The integrated chip of claim 1 , wherein the reflective structure comprises sidewalls extending between a bottom surface of the reflective structure and a top surface of the reflective structure, the sidewalls arranged laterally between the one or more trenches.
4. The integrated chip of claim 1 , further comprising:
a second dielectric arranged over the upper surface of the first dielectric; and
a grid disposed within the second dielectric, the grid vertically offset from the reflective structure.
5. The integrated chip of claim 4 , wherein the grid is disposed vertically between the reflective structure and the substrate.
6. The integrated chip of claim 4 , wherein the reflective structure is disposed vertically between the grid and the substrate.
7. The integrated chip of claim 1 ,
wherein the first surface of the substrate is a substantially flat surface extending between the one or more recesses and the one or more trenches, the substantially flat surface surrounding the one or more recesses.
8. The integrated chip of claim 1 , wherein the reflective structure comprises:
a first material having a first refractive index;
a second material having a second refractive index greater than the first refractive index; and
a third material having a third refractive index that is less than the second refractive index, wherein the second material has a bottommost surface contacting a topmost surface of the first material and the second material has a topmost surface contacting a bottommost surface of the third material.
9. The integrated chip of claim 1 , further comprising:
a color filter disposed over the substrate, wherein the reflective structure is arranged between the color filter and the first surface of the substrate.
10. The integrated chip of claim 1 , further comprising:
a color filter disposed over the substrate, wherein the reflective structure has a first height that is substantially equal to a second height of the color filter.
11. The integrated chip of claim 1 , wherein the reflective structure comprises a material having a first index of refraction that is less than a second index of refraction of the first dielectric.
12. An integrated chip, comprising:
an image sensor within a substrate, wherein the substrate comprises internal surfaces defining one or more recesses directly over the image sensor;
a first dielectric disposed within one or more trenches within the substrate, wherein the one or more trenches laterally surround the one or more recesses; and
wherein the substrate comprises a substantially flat surface extending between the one or more recesses and the one or more trenches, the substantially flat surface continuously extending in an unbroken path around the one or more recesses.
13. The integrated chip of claim 12 , further comprising:
a second dielectric disposed over the substantially flat surface of the substrate and laterally surrounding a grid; and
a reflective structure disposed over the substantially flat surface and vertically offset from the grid.
14. The integrated chip of claim 12 , further comprising:
a reflective structure continuously extending from directly over the image sensor to past opposing sides of the image sensor.
15. The integrated chip of claim 14 , wherein the reflective structure comprises sidewalls extending between a bottom surface of the reflective structure and a top surface of the reflective structure, the sidewalls defining an aperture that is directly over the image sensor.
16. The integrated chip of claim 12 , wherein the internal surfaces of the substrate define a plurality of recesses arranged in rows extending along a first direction and in columns extending along a second direction that is perpendicular to the first direction as viewed from a top-view of the substrate, the first dielectric arranged within the plurality of recesses.
17. An integrated chip, comprising:
an image sensing element arranged within a substrate;
a first dielectric disposed in one or more first trenches extending from a first side of the substrate, wherein the one or more first trenches are defined by first sidewalls of the substrate that laterally surround the image sensing element; and
a second dielectric disposed in a plurality of second trenches extending from a second side of the substrate opposing the first side, the plurality of second trenches are defined by second sidewalls of the substrate that are laterally between the first sidewalls defining the one or more first trenches, wherein the plurality of second trenches are laterally separated from the plurality of first trenches and vertically below the image sensing element.
18. The integrated chip of claim 17 , further comprising:
a gate structure disposed directly below one or more of the plurality of second trenches within the second side of the substrate.
19. The integrated chip of claim 17 , further comprising:
a multi-film reflector disposed over the first side of the substrate and laterally extending between the first sidewalls, wherein the multi-film reflector alternates between multiple layers of a first material having a first refractive index and multiple layers of a second material contacting the first material and having a second refractive index greater than the first refractive index.
20. The integrated chip of claim 17 , wherein the plurality of second trenches are disposed directly below the image sensing element.