Quantum dot devices with trenched substrates
Disclosed herein are quantum dot devices with trenched substrates, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a substrate having a trench disposed therein, wherein a bottom of the trench is provided by a first material, and a quantum well stack at least partially disposed in the trench. A material of the quantum well stack may be in contact with the bottom of the trench, and the material of the quantum well stack may be different from the first material.
1. A quantum dot device, comprising:
a substrate having a plurality of openings therein, wherein bottoms of the openings are provided by a first material; and
a fin, including a quantum well stack, the fin having a portion that is continuous above two or more of the openings, wherein the quantum well stack of the fin extends into the two or more of the openings so that a second material of the quantum well stack is in contact with the bottoms of the two or more of the openings, the second material being different from the first material.
2. The quantum dot device of claim 1 , wherein the quantum well stack includes a barrier layer and a quantum well layer, the barrier layer is in contact with the bottoms of the openings, and the barrier layer is between the bottoms of the openings and the quantum well layer.
3. The quantum dot device of claim 1 , wherein an individual one of the openings has a depth-to-width ratio greater than 1.5.
4. The quantum dot device of claim 3 , wherein the individual one of the openings has a depth-to-width ratio greater than 10.
5. The quantum dot device of claim 1 , wherein the first material is silicon and the second material includes silicon and germanium.
6. The quantum dot device of claim 5 , wherein the substrate includes silicon oxide at walls of the openings.
7. The quantum dot device of claim 5 , wherein the quantum well stack includes a quantum well layer that includes silicon.
8. A quantum computing device, comprising:
a quantum processing device, wherein the quantum processing device includes:
a substrate having a plurality of openings therein, wherein bottoms of the openings are provided by a first material, and
a fin, including a quantum well stack, the fin having a portion that is continuous above two or more of the openings, wherein the quantum well stack of the fin extends into the two or more of the openings so that a second material of the quantum well stack in contact with the bottoms of the two or more of the openings, the second material being different from the first material;
a non-quantum processing device, coupled to the quantum processing device, to control voltages applied to gates on the first and second quantum well stack regions; and
a memory device to store data generated by the read quantum well layer during operation of the quantum processing device.
9. The quantum computing device of claim 8 , further comprising:
a cooling apparatus to maintain a temperature of the quantum processing device below 5 degrees Kelvin.
10. The quantum computing device of claim 8 , wherein the memory device is to store instructions for a quantum computing algorithm to be executed by the quantum processing device.
11. The quantum dot device of claim 1 , further comprising:
multiple gates on the quantum well stack.
12. The quantum dot device of claim 1 , wherein the openings include a first opening and a second opening, and wherein the first and second openings are parallel and spaced apart by a distance between 100 and 250 nanometers.
13. The quantum dot device of claim 1 , wherein the quantum well stack includes a quantum well layer, the quantum well stack is patterned into multiple parallel fins, each fin including some of the quantum well layer.
14. The quantum dot device of claim 1 , wherein the substrate includes the first material and a different other material, and the openings are formed in the other material and extends down to the first material.
15. The quantum dot device of claim 14 , wherein the other material includes oxygen.
16. The quantum dot device of claim 2 , wherein the quantum well layer is in the openings.
17. The quantum dot device of claim 1 , wherein the quantum well stack includes a barrier layer and a quantum well layer, and the quantum well layer is outside of the openings.
18. The quantum computing device of claim 8 , wherein the quantum well stack includes a barrier layer and a quantum well layer, the barrier layer is in contact with the bottoms of the openings, and the barrier layer is between the bottoms of the openings and the quantum well layer.
19. The quantum computing device of claim 18 , wherein the quantum well layer is in the openings.
20. The quantum computing device of claim 8 , wherein the quantum well stack includes a barrier layer and a quantum well layer, and the quantum well layer is outside of the openings.