MRAM device formation with controlled ion beam etch of MTJ
Controlled IBE techniques for MRAM stack patterning are provided. In one aspect, a method of forming an MRAM device includes: patterning an MRAM stack disposed on a dielectric into individual memory cells using IBE landing on the dielectric while dynamically adjusting an etch time to compensate for variations in a thickness of the MRAM stack, wherein each of the memory cells includes a bottom electrode, an MTJ, and a top electrode; removing foot flares from the bottom electrode of the memory cells which are created during the patterning of the MRAM stack; removing residue from sidewalls of the memory cells which includes metal redeposited during the patterning of the MRAM stack and during the removing of the foot flares; and covering the memory cells in a dielectric encapsulant. An MRAM device is also provided.
1. A method of forming a magnetic random access memory (MRAM) device, the method comprising:
patterning an MRAM stack disposed on a dielectric into individual memory cells using ion beam etching (IBE) landing on the dielectric while endpoint detection is used for dynamically adjusting an etch time to compensate for variations in a thickness of the MRAM stack, wherein each of the memory cells as-patterned comprises a bottom electrode disposed on the dielectric, a magnetic tunnel junction (MTJ) disposed on the bottom electrode, and a top electrode disposed on the MTJ;
removing foot flares from the bottom electrode of the memory cells, wherein the foot flares are created during the patterning of the MRAM stack;
removing residue from sidewalls of the memory cells, wherein the residue comprises metal redeposited during the patterning of the MRAM stack and during the removing of the foot flares; and
covering the memory cells in a dielectric encapsulant.
2. The method of claim 1 , further comprising:
monitoring an optical emission signal while the MRAM stack is being patterned.
3. The method of claim 1 , wherein the dielectric comprises a silicon (Si)-containing dielectric.
4. The method of claim 3 , wherein the Si-containing dielectric is selected from the group consisting of: silicon carbonitride (SiCN(H)), silicon oxide (SiOx), silicon nitride (SiN), silicon oxycarbide (SiCOH), and combinations thereof.
5. The method of claim 3 , further comprising:
monitoring an optical emission signal while the MRAM stack is being patterned; and
endpointing the IBE when a change in the optical emission signal is detected corresponding to an optical emission wavelength of Si.
6. The method of claim 5 , wherein the optical emission wavelength of Si is from about 250.6 nm to about 252.8 nm, and ranges therebetween.
7. The method of claim 1 , wherein the foot flares are removed from the bottom electrode of the memory cells using an IBE overetch.
8. The method of claim 7 , wherein the IBE overetch is performed using a fixed etch time.
9. The method of claim 1 , wherein the residue is removed from the sidewalls of the memory cells using a clean-up IBE.
10. The method of claim 1 , further comprising:
depositing a conformal dielectric over the memory cells;
etching back the conformal dielectric to form an encapsulant along the sidewalls of the memory cells; and
burying the memory cells in an interlayer dielectric (ILD), wherein the encapsulant and the ILD form the dielectric encapsulant covering the memory cells.
11. The method of claim 10 , wherein the conformal dielectric and the ILD each comprises a material selected from the group consisting of: SiCN(H), SiOx, SiN, SiCOH, and combinations thereof.
12. A method of forming an MRAM device, the method comprising:
patterning an MRAM stack disposed on an Si-containing dielectric into individual memory cells using IBE landing on the Si-containing dielectric while dynamically adjusting an etch time to compensate for variations in a thickness of the MRAM stack by monitoring an optical emission signal while the MRAM stack is being patterned, and endpointing the IBE when a change in the optical emission signal is detected corresponding to an optical emission wavelength of Si, wherein each of the memory cells as-patterned comprises a bottom electrode disposed on the Si-containing dielectric, an MTJ disposed on the bottom electrode, and a top electrode disposed on the MTJ;
removing foot flares from the bottom electrode of the memory cells, wherein the foot flares are created during the patterning of the MRAM stack;
removing residue from sidewalls of the memory cells, wherein the residue comprises metal redeposited during the patterning of the MRAM stack and during the removing of the foot flares; and
covering the memory cells in a dielectric encapsulant.
13. The method of claim 12 , wherein the Si-containing dielectric is selected from the group consisting of: SiCN(H), SiOx, SiN, SiCOH, and combinations thereof.
14. The method of claim 12 , wherein the optical emission wavelength of Si is from about 250.6 nm to about 252.8 nm, and ranges therebetween.
15. The method of claim 12 , further comprising:
depositing a conformal dielectric over the memory cells;
etching back the conformal dielectric to form an encapsulant along the sidewalls of the memory cells; and
burying the memory cells in an ILD, wherein the encapsulant and the ILD form the dielectric encapsulant covering the memory cells.