Low profile phased array
A low profile array (LPA) includes an antenna element array layer having at least one Faraday wall, and a beamformer circuit layer coupled to the antenna element array layer. The beamformer circuit layer has at least one Faraday wall. The Faraday walls extends between ground planes associated with at least one of the antenna element array layer and the beamformer circuit layer.
1. An array antenna comprising:
a plurality of low profile arrays (LPAs), each LPA including
an antenna element array layer having at least one Faraday wall, and
a beamformer circuit layer coupled to the antenna element array layer, the beamformer circuit layer having at least one Faraday wall, wherein the Faraday walls extend between ground planes associated with at least one of the antenna element array layer and the beamformer circuit layer,
wherein four LPAs arranged such that a first set of tuning elements of a first LPA and a first set of tuning elements of a second LPA are respectively adjacent to a second set of tuning elements of a third LPA and a second set of tuning elements of a fourth LPA.
2. The array antenna according to claim 1 , wherein the LPA has a total thickness of less than about 47 mils.
3. The array antenna according to claim 1 , wherein the antenna element array layer further has a substrate, a conductor applied on the substrate, and a radiator is formed by removing conductive material and printing a conductor to create the radiator.
4. The array antenna according to claim 3 , wherein the at least one Faraday wall of the antenna element array layer is created by forming a trench that is back-filled with a conductive material.
5. The array antenna according to claim 3 , wherein the at least one Faraday wall of the beamformer circuit layer is created by forming a trench that is back-filled with a conductive material.
6. The array antenna according to claim 3 , further comprising a vertical launch that extends through the radiator of antenna element array layer and the beamformer circuit layer.
7. The array antenna according to claim 6 , wherein the vertical launch is created by soldering pads on the radiator and the beamformer circuit layer prior to bonding so a solder bump is present on the surface of the beamformer circuit, drilling a center conductor hole, and filling the center conductor hole with copper.
8. The array antenna according to claim 6 , further comprising a logic circuit layer disposed below the beamformer circuit layer.
9. The array antenna according to claim 8 , further comprising a phase shift layer disposed below the logic circuit layer.
10. The array antenna according to claim 9 , wherein the vertical launch extends through the logic circuit layer and the phase shift layer.