IP Library › Granted Patent US 11,160,174
Granted Patent B2
US 11,160,174 · App. 16/307,973 · Granted Oct 26, 2021

Method of manufacturing multilayer substrate

Inventor: Toshikazu Harada (Kariya, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H05K3/46H01L23/12H05K3/0026H05K3/40H05K3/4053H05K3/06H05K2203/061H05K2203/107H05K2203/1131
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,160,174
App. No.
16/307,973
Granted
Oct 26, 2021
Kind
B2
Abstract

In a preparatory process of a method of manufacturing a multilayer substrate, an insulating substrate is prepared, with a conductor pattern formed only on one surface of the insulating substrate. At that time, the conductor pattern is constituted of the Cu element, a Ni layer is formed on the surface of the conductor pattern that is on the side of the insulating substrate. In a first forming process, a via hole having the conductor pattern as the bottom thereof is formed in the insulating substrate. At that time, the Ni layer that is in the area of the bottom is removed. In a filling process, a conductive paste is filled in the interior of the via hole. In a second forming process, a stacked body is formed by stacking a plurality of the insulating substrates. In a third forming process, the stacked body is heated while being subjected to pressure.

Claims (33)

1. A method of manufacturing a multilayer substrate comprising:

preparing a plurality of insulating substrates with a conductor pattern, each of the insulating substrates having a first surface and a second surface disposed opposite the first surface, each of the conductor patterns being made up of at least elemental copper (Cu) and being formed only on the first surface of the insulating substrate, each of the conductor patterns having a surface metal layer being made up of at least an elemental metal different than the elemental copper (Cu) of the conductor pattern and being formed on a surface of the conductor pattern that is oriented toward the insulating substrate, and each of the surface metal layers sandwiched between the first surface of the insulating substrate and the conductor pattern;

forming a via hole in each of the insulating substrates, each of the via holes having an opening on the second surface of the insulating substrate and a bottom disposed opposite the opening, and each of the conductor patterns having a portion of the conductor pattern being disposed at the bottom of the via hole;

removing the surface metal layer from each of the portions of the conductor patterns that are disposed at the bottoms of the via holes;

filling an interior of each of the via holes with a via forming material, the via forming material containing a plurality of metal particles, the plurality of metal particles being made up of one or more elemental metals;

adjusting a composition ratio of the metal particles in the via forming material, the composition ratio of the metal particles being a mass percentage of the metal particles in the via forming material;

stacking the plurality of insulating substrates to form a stacked body; and

heating and applying pressure to the stacked body to cause the plurality of insulating substrates to fuse together and to sinter the plurality of metal particles in the via forming material, wherein

an activation energy of the elemental metal of the surface metal layer is higher than an activation energy of the elemental copper of the conductor pattern and an activation energy of the one or more elemental metals of the via forming material for each of the metal surface layers and conductor patterns,

the sintering of the plurality of metal particles of the via forming material forms a via in each of the insulating substrates and a diffusion layer between the via and the conductor pattern for each of the insulating substrates, the diffusion layer having the elemental copper of the conductor pattern and at least one of the one or more elemental metals of the via forming material, and

the adjustment of the composition ratio of the metal particles forms the via in each of the insulating substrates with a predetermined alloy composition.

2. The method of claim 1 , wherein

the plurality of metal particles in the via forming material includes a plurality of elemental silver (Ag) particles and a plurality of elemental tin (Sn) particles, and

the diffusion layer in each of the insulating substrates is formed from the elemental copper (Cu) in the conductor pattern and elemental tin (Sn) in the via forming material.

3. The method of claim 2 , wherein

the surface metal layer is made of more than one elemental metal selected from nickel (Ni), cobalt (Co), platinum (Pt), tungsten (W), and molybdenum (Mo).

4. The method of claim 1 , wherein

the plurality of metal particles in the via forming material includes a plurality of elemental silver (Ag) particles, and

the diffusion layer in each of the insulating substrates is formed from the elemental copper (Cu) in the conductor pattern and elemental silver (Ag) in the via forming material.

5. The method of claim 1 , wherein

the plurality of metal particles in the via forming material includes a plurality of elemental copper (Cu) particles and a plurality of elemental tin (Sn) particles, and

the diffusion layer in each of the insulating substrates is formed from the elemental copper (Cu) in the conductor pattern and elemental tin (Sn) in the via forming material.

6. A method of manufacturing a multilayer substrate comprising:

preparing a plurality of insulating substrates with a conductor pattern, each of the insulating substrates having a first surface and a second surface disposed opposite the first surface, each of the conductor patterns being made up of at least elemental copper (Cu) element and being formed only on the first surface of the insulating substrate, each of the conductor patterns having a surface metal layer being made up of at least an elemental metal different than the elemental copper (Cu) of the conductor pattern and being formed on a surface of the conductor pattern that is oriented toward the insulating substrate, and each of the surface metal layers sandwiched between the first surface of the insulating substrate and the conductor pattern;

forming a via hole in each of the insulating substrates, each of the via holes having an opening on the second surface of the insulating substrate and a bottom disposed opposite the opening, and each of the conductor patterns having a portion of the conductor pattern being disposed at the bottom of the via hole;

removing the surface metal layer from each of the portions of the conductor patterns that are disposed at the bottoms of the via holes;

filling an interior of each of the via holes with a via forming material, the via forming material containing a plurality of metal particles, the plurality of metal particles being made up of one or more elemental metals;

stacking the plurality of insulating substrates to form a stacked body; and

heating and applying pressure to the stacked body to cause the plurality of insulating substrates to fuse together and to sinter the plurality of metal particles in the via forming material, wherein

an activation energy of the elemental metal of the surface metal layer is higher than an activation energy of the elemental copper of the conductor pattern and an activation of the one or more elemental metals of the via forming material for each of the metal surface layers and conductor patterns,

the sintering of the plurality of metal particles of the via forming material forms a via in each of the insulating substrates and a diffusion layer between the via and the conductor pattern for each of the insulating substrates,

the plurality of metal particles in the via forming material includes a plurality of elemental silver (Ag) particles, and

the diffusion layer in each of the insulating substrates is formed from the elemental copper (Cu) in the conductor pattern and elemental silver (Ag) in the via forming material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2021
From: DENSO CORPORATION
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 056201/0981 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 2, 2019
From: HARADA, TOSHIKAZU
To: DENSO CORPORATION
Reel/Frame 047879/0722 →
Priority Claims (1)
JP JP2016-115435 · Jun 9, 2016 · national
Continuity (1)
Related Publication 20190261517A1 · Aug 22, 2019