IP Library › Granted Patent US 11,163,327
Granted Patent B2
US 11,163,327 · App. 16/686,404 · Granted Nov 2, 2021

Digitally assisted low dropout (LDO) voltage regulator

Inventors: Miguel E. Perez (Poughkeepsie, NY); Michael Sperling (Poughkeepsie, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G05F1/59G05F1/462G05F1/563G05F1/565G05F1/575
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,163,327
App. No.
16/686,404
Granted
Nov 2, 2021
Kind
B2
Abstract

Aspects of the invention include a circuit having a two-stage amplifier coupled to a transistor array and to a comparator, the transistor array being configured to provide an output to a load, the transistor array including transistors. The circuit includes a controller coupled to the comparator and to the transistor array, the two-stage amplifier being configured to modulate a current density in the transistor array via gate terminals of the transistors, wherein, by using the comparator and the controller, the two-stage amplifier is configured to modulate a number of the transistors that are to couple to the load.

Claims (30)

1. A circuit comprising:

a two-stage amplifier coupled to a transistor array and to a comparator, differential output terminals of the two-stage amplifier are coupled to input terminals of the comparator, the transistor array being configured to provide an output to a load, the transistor array comprising transistors; and

a controller coupled to the comparator and to the transistor array, the two-stage amplifier being configured to modulate a current density in the transistor array via gate terminals of the transistors, wherein, by using the comparator and the controller, the two-stage amplifier is configured to modulate a number of the transistors that are to couple to the load.

2. The circuit of claim 1 , wherein the two-stage amplifier is configured to modulate the current density in the transistor array via the gate terminals of the transistors based on receiving the output from the transistor array and a reference voltage.

3. The circuit of claim 1 , wherein the two-stage amplifier is configured to modulate the current density in the transistor array via the gate terminals of the transistors by modulating a gate voltage provided to the gate terminals.

4. The circuit of claim 1 , wherein, by using the comparator and the controller, the two-stage amplifier is configured to modulate the number of the transistors that are to couple to the load by causing the controller to connect one or more of the transistors to and disconnect one or more of the transistors from the load.

5. The circuit of claim 1 , wherein the two-stage amplifier is configured to provide a differential output to the comparator.

6. The circuit of claim 5 , wherein, based on the differential output, the comparator is configured to provide a positive difference or a negative difference to the controller.

7. The circuit of claim 6 , wherein:

based on receiving the positive difference, the controller is configured to connect one or more of the transistors to the load; and

based on receiving the negative difference the controller is configured to disconnect one or more of the transistors from the load.

8. The circuit of claim 1 , wherein the current density comprises an amount of current through each of the transistors coupled to the load.

9. The circuit of claim 8 , wherein the two-stage amplifier is configured increase or decrease the amount of current through each of the transistors coupled to the load.

10. A method of forming a circuit, the method comprising:

providing a two-stage amplifier coupled to a transistor array and to a comparator, differential output terminals of the two-stage amplifier are coupled to input terminals of the comparator, the transistor array being configured to provide an output to a load, the transistor array comprising transistors; and

coupling a controller to the comparator and the transistor array, the two-stage amplifier being configured to modulate a current density in the transistor array via gate terminals of the transistors, wherein, by using the comparator and the controller, the two-stage amplifier is configured to modulate a number of the transistors that are to couple to the load.

11. The method of claim 10 , wherein the two-stage amplifier is configured to modulate the current density in the transistor array via the gate terminals of the transistors based on receiving the output from the transistor array and a reference voltage.

12. The method of claim 10 , wherein the two-stage amplifier is configured to modulate the current density in the transistor array via the gate terminals of the transistors by modulating a gate voltage provided to the gate terminals.

13. The method of claim 10 , wherein, by using the comparator and the controller, the two-stage amplifier is configured to modulate the number of the transistors that are to couple to the load by causing the controller to connect one or more of the transistors to and disconnect one or more of the transistors from the load.

14. The method of claim 10 , wherein the two-stage amplifier is configured to provide a differential output to the comparator.

15. The method of claim 14 , wherein, based on the differential output, the comparator is configured to provide a positive difference or a negative difference to the controller.

16. The method of claim 15 , wherein:

based on receiving the positive difference, the controller is configured to connect one or more of the transistors to the load; and

based on receiving the negative difference the controller is configured to disconnect one or more of the transistors from the load.

17. The method of claim 10 , wherein the current density comprises an amount of current through each of the transistors coupled to the load.

18. The method of claim 17 , wherein the two-stage amplifier is configured increase or decrease the amount of current through each of the transistors coupled to the load.

19. A circuit comprising:

a two-stage amplifier comprising an error amplifier, a replica amplifier, a replica transistor, a first transistor, and a second transistor, the two-stage amplifier being coupled to a transistor array and to a comparator, the transistor array being configured to provide an output to a load, the transistor array comprising transistors; and

a controller coupled to the comparator and to the transistor array, the two-stage amplifier being configured to modulate a current density in the transistor array via gate terminals of the transistors, wherein, by using the comparator and the controller, the two-stage amplifier is configured to modulate a number of the transistors that are to couple to the load, the error amplifier being coupled to the second transistor and the comparator, the error amplifier being configured to provide a differential output to the comparator; and

an input terminal of the replica amplifier is coupled to a drain terminal of the replica transistor and a source terminal of the first transistor, an output terminal of the replica amplifier being coupled to a gate of the first transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2019
From: PEREZ, MIGUEL E.; SPERLING, MICHAEL
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 051035/0993 →
Continuity (1)
Related Publication 20210149422A1 · May 20, 2021