IP Library › Granted Patent US 11,176,067
Granted Patent B2
US 11,176,067 · App. 16/909,396 · Granted Nov 16, 2021

Integrated circuit with combined interrupt and serial data output

Inventors: Richard Edwin Hubbard (Lavon, TX); Richard Sterling Broughton (Dallas, TX); Vijayalakshmi Devarajan (Plano, TX); Mark Edward Wentroble (Plano, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
G06F13/24G06F13/4282
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,176,067
App. No.
16/909,396
Granted
Nov 16, 2021
Kind
B2
Abstract

An integrated circuit includes a combined serial data output and interrupt output terminal, a serial communication control circuit; an interrupt generation circuit, and an output circuit. The output circuit includes a serial data input, an interrupt input, and a combined serial data and interrupt output. The serial data input is coupled to a serial data output of the serial communication circuit. The interrupt input is coupled to an interrupt output of the interrupt generation circuit. The combined serial data and interrupt output is coupled to the combined serial data output and interrupt output terminal.

Claims (37)

1. An electronic system, comprising:

a first integrated circuit, comprising:

a serial data input terminal; and

an interrupt input terminal; and

a second integrated circuit comprising:

a combined serial data output and interrupt output terminal coupled to the serial data input terminal of the first integrated circuit and the interrupt input terminal of the first integrated circuit;

a serial communication control circuit wherein the serial communication control circuit is configured to generate a transaction envelope signal;

wherein when the transaction envelope signal is generated no serial data is transferred;

an interrupt generation circuit; and

an output circuit comprising:

a serial data input coupled to a serial data output of the serial communication circuit;

an interrupt input coupled to an interrupt output of the interrupt generation circuit; and

a combined serial data and interrupt output coupled to the combined serial data output and interrupt output terminal.

2. The electronic system of claim 1 , further comprising a pull-up resistor coupled to the combined serial data output and interrupt output terminal.

3. An integrated circuit, comprising:

a combined serial data output and interrupt output terminal;

a serial communication control circuit wherein the serial communication control circuit is configured to generate a transaction envelope signal;

wherein when the transaction envelope signal is generated no serial data is transferred;

an interrupt generation circuit; and

an output circuit comprising:

a serial data input coupled to a serial data output of the serial communication circuit;

an interrupt input coupled to an interrupt output of the interrupt generation circuit; and

a combined serial data and interrupt output coupled to the combined serial data output and interrupt output terminal.

4. An integrated circuit, comprising:

an output terminal configured to provide an interrupt output signal and a serial data output signal;

an input terminal configured to receive a select signal that requests serial communication with another integrated circuit;

a serial communication control circuit configured to generate the serial data output signal and a transaction envelope signal;

wherein when the transaction envelope signal is generated no serial data is transferred;

an interrupt generation circuit configured to generate the interrupt output signal; and

an output circuit coupled to the output terminal, the serial communication control circuit, and the interrupt generation circuit; wherein the output circuit is configured to:

provide the serial data output signal to the output terminal responsive to the select signal being active; and

provide the interrupt output signal to the to the output terminal responsive to the select signal being inactive.

5. The integrated circuit of claim 4 , wherein the output circuit comprises:

a driver circuit coupled to the output terminal; and

a selector circuit coupled to the driver circuit, the serial communication control circuit, the interrupt generation circuit, and the input terminal; wherein the selector circuit is configured to selectively route the serial data output signal or the interrupt output signal to the driver circuit based on the select signal.

6. The integrated circuit of claim 4 , wherein the output circuit comprises a driver circuit configured to drive only the serial data output signal to the output terminal.

7. The integrated circuit of claim 6 , wherein the output circuit comprises a transistor coupled to an output of the driver circuit, and configured to drive only the interrupt output signal to the output terminal.

Continuity (2)
Continuation 16289845 · Mar 1, 2019
Related Publication 20200320028A1 · Oct 8, 2020