Feedback for power management of a memory die using capacitive coupling
A memory device may include a pin for receiving a direct current (DC) voltage indicating an operating configuration setting of the memory device and for communicating an alternating current (AC) voltage signal that provides feedback to a power management component. The memory device may determine that a supply voltage is outside of a target range, and may drive the AC signal onto the pin based on determining that the supply voltage is outside the range. The pin may be coupled with a capacitive component the passes the AC signal and blocks the DC signal. The power management component may receive the capacitively coupled AC signal and may maintain or adjust the supply voltage based on the received AC signal.
1. An apparatus, comprising:
an array of memory cells;
a pin for communicating a direct current (DC) voltage that indicates an operating configuration setting of the apparatus;
a capacitive component coupled with the pin and for communicating an alternating current (AC) signal at the pin; and
a controller operable to cause the apparatus to:
determine that a supply voltage for the array of memory cells is outside a target range associated with the supply voltage, and
generate the AC signal at the pin based at least in part on determining that the supply voltage is outside the target range.
2. The apparatus of claim 1 , further comprising:
a driver coupled with the pin and the controller and operable to generate the AC signal by generating a quantity of voltage pulses at the pin based at least in part on a signal received from the controller.
3. The apparatus of claim 2 , wherein the controller is further operable to cause the apparatus to:
determine a value of the supply voltage, wherein the quantity of voltage pulses is based at least in part on the value of the supply voltage.
4. The apparatus of claim 1 , further comprising:
a voltage source coupled with the pin and configured to generate the DC voltage.
5. The apparatus of claim 1 , wherein the controller is further operable to cause the apparatus to:
determine the operating configuration setting of the apparatus based at least in part on the DC voltage at the pin, wherein the operating configuration setting indicates a configuration of a command address mode of the apparatus or a configuration of a test mode of the apparatus.
6. The apparatus of claim 5 , wherein the controller is further operable to cause the apparatus to:
perform, before determining that the supply voltage is outside the target range, an access operation on the array of memory cells based at least in part on the operating configuration setting.
7. The apparatus of claim 5 , wherein the controller is further operable to cause the apparatus to:
perform, before determining that the supply voltage is outside the target range, a test operation on the array of memory cells based at least in part on the operating configuration setting.
8. The apparatus of claim 1 , wherein the controller is further operable to cause the apparatus to:
determine, at a first time, that the supply voltage is below a lower voltage threshold of the target range, wherein determining that the supply voltage is outside of the target range is based at least in part on determining that the supply voltage is below the lower voltage threshold; and
generate a first AC signal based at least in part on determining that the supply voltage is below the lower voltage threshold, wherein generating the AC signal comprises generating the first AC signal.
9. The apparatus of claim 8 , wherein the controller is further operable to cause the apparatus to:
determine, at a second time different than the first time, that the supply voltage is above an upper voltage threshold of the target range; and
generate a second AC signal based at least in part on determining that the supply voltage is above the upper voltage threshold.
10. The apparatus of claim 1 , wherein the capacitive component comprises a discrete capacitor.
11. A method, comprising:
identifying, at a memory device based at least in part on a direct current (DC) voltage at a pin of the memory device, a configuration setting of the memory device;
determining, after identifying the configuration setting, that a supply voltage for the memory device is outside a target range associated with the supply voltage; and
generating an alternating current (AC) signal at the pin of the memory device based at least in part on determining that the supply voltage is outside the target range.
12. The method of claim 11 , further comprising:
performing, before determining that the supply voltage is outside the target range, a first access operation based at least in part on the configuration setting of the memory device.
13. The method of claim 11 , wherein the configuration setting indicates a configuration of a command address mode of the memory device or a configuration of a test mode of the memory device.
14. The method of claim 11 , further comprising:
determining a value of the supply voltage, wherein generating the AC signal at the pin comprises generating a quantity of voltage pulses at the pin based at least in part on the value of the supply voltage.
15. The method of claim 14 , wherein the quantity of voltage pulses indicates the value of the supply voltage.
16. The method of claim 11 , further comprising:
determining that the supply voltage is below a lower voltage threshold of the target range, wherein determining that the supply voltage is outside of the target range is based at least in part on determining that the supply voltage is below the lower voltage threshold, and
wherein generating the AC signal at the pin comprises generating a quantity of voltage pulses at the pin based at least in part on determining that the supply voltage is below the lower voltage threshold.