Magnetic memory device and method for manufacturing the same
A method for forming a magnetic memory device is disclosed. At least one magnetic tunneling junction (MTJ) stack is formed on the substrate. The MTJ stack comprises a reference layer, a tunnel barrier layer and a free layer. A top electrode layer is formed on the MTJ stack. A patterned sacrificial layer is formed on the top electrode layer. The MTJ stack is then subjected to a MTJ patterning process in a high-density plasma chemical vapor deposition (HDPCVD) chamber, thereby sputtering off the MTJ stack not covered by the patterned sacrificial layer. During the MTJ patterning process, sidewalls of layers or sub-layers of the MTJ stack are simultaneously passivated in the HDPCVD chamber by depositing a sidewall protection layer.
1. A magnetic memory device, comprising:
a substrate;
at least a memory stack on the substrate, said memory stack comprising magnetic tunneling junction (MTJ) element sandwiched by a bottom electrode layer and a top electrode layer, wherein said MTJ element comprises a reference layer disposed on said bottom electrode layer, a tunnel barrier layer disposed on said reference layer, and a free layer disposed on said tunnel barrier layer, and wherein said MTJ element comprises a sloped sidewall; and
a non-conformal sidewall protection layer covering said sloped sidewall, wherein a thickness of the non-conformal sidewall protection layer decreases from top to bottom.
2. The magnetic memory device according to claim 1 , wherein said sidewall protection layer comprises silicon nitride.
3. The magnetic memory device according to claim 1 , wherein said sidewall protection layer comprises silicon oxide.
4. The magnetic memory device according to claim 1 , wherein said reference layer comprises a bottom pinned layer, a ruthenium metal layer, a top pinned layer, a tantalum metal layer, and a magnetic material layer.
5. The magnetic memory device according to claim 1 , wherein said reference layer comprises a magnetic material comprising at least one material selected from the group consisting of: CoFeB, CoFeBTi, CoFeBZr, CoFeBHf, CoFeBV, CoFeBTa, CoFeBCr, CoFeNi, CoFeTi, CoFeZr, CoFeHf, CoFeV, CoFeNb, CoFeTa, CoFeCr, CoFeMo, CoFeW, CoFeAl, CoFeSi, CoFeGe, CoFeP, and any combinations thereof.
6. The magnetic memory device according to claim 1 , wherein said reference layer comprises a magnetic structure comprising repeated alternating layers of two or more materials.
7. The magnetic memory device according to claim 1 , wherein said reference layer comprises a magnetic material comprising at least one material selected from the group consisting of: CoCr, CoCrB, CoCrPt, CoCrPtB, CoCrPd, CoCrTi, CoCrZr, CoCrHf, CoCrV, CoCrNb, CoCrTa, and any combinations thereof.
8. The magnetic memory device according to claim 1 , wherein said tunnel barrier layer comprises at least one material selected from the group consisting of: MgO, Al 2 O 3 , MgAlO, MgZnO, HfO, and any combinations thereof.
9. The magnetic memory device according to claim 1 , wherein said free layer comprise repeated alternating layers of two or more materials.
10. The magnetic memory device according to claim 1 , wherein said free layer comprises at least one material selected from the group consisting of:
Fe, Co, B, Ni, and any combinations thereof.
11. The magnetic memory device according to claim 1 , wherein said free layer comprises at least one material selected from the group consisting of:
CoFeB, CoFeBTi, CoFeBZr, CoFeBHf, CoFeBV, CoFeBTa, CoFeBCr, CoFeNi, CoFeTi, CoFeZr, CoFeHf, CoFeV, CoFeNb, CoFeTa, CoFeCr, CoFeMo, CoFeW, CoFeAl, CoFeSi, CoFeGe, CoFeP, and any combinations thereof.
12. The magnetic memory device according to claim 1 , wherein said MTJ element further comprises a capping layer interposed between said top electrode layer and said free layer.
13. The magnetic memory device according to claim 12 , wherein said capping layer comprises at least one material selected from the group consisting of: MgO and Al 2 O 3 .
14. The magnetic memory device according to claim 1 , wherein said top electrode layer comprises at least one material selected from the group consisting of: a ruthenium (Ru) layer and a tantalum (Ta) layer.
15. The magnetic memory device according to claim 14 , wherein said top electrode layer further comprises at least one material selected from the group consisting of: a titanium nitride (TiN) layer and a tantalum nitride (TaN) layer.
16. The magnetic memory device according to claim 1 , wherein said top electrode is electrically connected to a bit line overlying said MTJ element.
17. The magnetic memory device according to claim 1 , wherein said bottom electrode layer comprises at least one material selected from the group consisting of: NiCr, Ru, Pt, Cu, Ta, TaN, Ti, TiN, and any combinations thereof.
18. The magnetic memory device according to claim 1 , wherein said bottom electrode layer is electrically coupled to a drain doping region of an access transistor disposed on said substrate.
19. The magnetic memory device according to claim 1 , wherein said substrate comprises at least one material selected from the group consisting of: a silicon substrate and a silicon-on-insulator (SOI) substrate.
20. The magnetic memory device according to claim 1 further comprises a high-density plasma chemical vapor deposition (HDPCVD) oxide layer covering said sidewall protection layer.
21. The magnetic memory device according to claim 1 , wherein said sidewall protection layer completely covers said sloped sidewall.
22. A magnetic memory device, comprising:
a substrate;
at least a memory stack on the substrate, said memory stack comprising magnetic tunneling junction (MTJ) element sandwiched by a bottom electrode layer and a top electrode layer, wherein said MTJ element comprises a reference layer disposed on said bottom electrode layer, a tunnel barrier layer disposed on said reference layer, and a free layer disposed on said tunnel barrier layer, and wherein said MTJ element comprises a sloped sidewall;
an inter-layer dielectric layer disposed around said bottom electrode layer and between said bottom electrode layer and said MTJ element; and
a sidewall protection layer covering said sloped sidewall, wherein the sidewall protection layer does not extend to a top surface of the inter-layer dielectric layer.