Methods and systems for compressing shape data for electronic designs

1. A method for compression of shape data for a set of electronic designs, the method comprising:

inputting a set of shape data, wherein the set of shape data represents a set of shapes for a device fabrication process;

using a convolutional autoencoder on the set of shape data, wherein the convolutional autoencoder has a pre-determined set of convolution layers, including a kernel size and filter size for each convolution layer; and

encoding the set of shape data to compress the set of shape data, using the pre-determined set of convolution layers of the convolutional autoencoder, to create a set of encoded shape data, wherein the pre-determined set of convolution layers are tuned for increased accuracy of the set of encoded shape data based on design rules for the set of electronic designs;

determining an error value for the set of encoded shape data; and

outputting the input set of shape data instead of the set of encoded shape data by determining the error value of the set of encoded shape data is greater than a pre-determined threshold;

wherein the set of shape data comprises a scanning electron microscope (SEM) image, and a mask defect is identified in the set of encoded shape data.

2. The method of claim 1 wherein the encoding with the convolutional autoencoder comprises a flattening step followed by an embedding step, the embedding step involving a fully-connected embedding layer which outputs a one-dimensional vector.

3. The method of claim 2 wherein the one-dimensional vector comprises 256 elements.

4. The method of claim 1 wherein the set of convolution layers comprises at least four convolution layers.

5. The method of claim 4 wherein the set of convolution layers comprises:

a first convolution layer using a first 5×5 kernel;

a second convolution layer following the first convolution layer and using a second 5×5 kernel;

a third convolution layer following the second convolution layer and using a first 3×3 kernel; and

a fourth convolution layer following the third convolution layer and using a second 3×3 kernel.

6. The method of claim 5 wherein the first, second, third and fourth convolutional layers use filter sizes of 32, 64, 128 and 256, respectively.

7. The method of claim 5 wherein a stride of 2 is used in each of the four convolution layers.

8. The method of claim 1 , further comprising decoding the set of encoded shape data into decoded data using the convolutional autoencoder.

9. The method of claim 1 wherein:

the set of shape data comprises a grid of tiles decomposed from a larger image; and

the encoding comprises encoding the grid of tiles on a tile-by-tile basis.

10. The method of claim 9 , wherein each tile in the grid of tiles comprises a halo to reduce artifacts at a boundary of the tile, the halo being a region of neighboring pixels surrounding the tile, the halo having a size chosen based on at least one of: the number of convolution layers and the kernel size of the convolution layers.

11. The method of claim 1 wherein the error value is based on a distance criterion to manufacture the set of shape data on a surface, wherein the distance criterion is based on the design rules.

12. The method of claim 1 wherein the error value is based on a difference in dose energy to manufacture the set of shape data on a surface, wherein the difference in dose energy is based on the design rules.

13. The method of claim 1 wherein the device fabrication process is a flat-panel display fabrication process.

14. The method of claim 1 wherein the SEM image further comprises a simulated mask image.

15. The method of claim 1 , wherein the design rules comprise a minimum line width or a minimum line-to-line spacing.