Imaging device and camera system
View Patent ↗An imaging device including a semiconductor substrate; pixels arranged on the semiconductor substrate in a first direction; and a signal line extending in the first direction. Each of the pixels includes a photoelectric converter generating signal charge by photoelectric conversion, a charge accumulation region that accumulates the signal charge output from the photoelectric converter, a first transistor that outputs a signal to the signal line according to an amount of the signal charge accumulated in the charge accumulation region, a capacity circuit that is coupled to a gate of the first transistor and that includes a first capacitive element, the first capacitive element including a first electrode, a second electrode and an insulating layer between the first electrode and the second electrode, at least one of the first electrode and the second electrode containing a metal. The first capacitive element is closer to the semiconductor substrate than the signal line.
1. An imaging device comprising:
a semiconductor substrate;
pixels arranged in a first direction; and
a signal line that extends in the first direction, wherein each of the pixels includes
a photoelectric converter that generates signal charge by photoelectric conversion,
a region into which the signal charge is input,
a first transistor that outputs a signal to the signal line according to an amount of the signal charge input into the region,
a capacity circuit that is coupled to a gate of the first transistor and that includes a first capacitive element, the first capacitive element including a first electrode, a second electrode and a first insulating layer between the first electrode and the second electrode, at least one of the first electrode and the second electrode containing a metal, the gate of the first transistor overlapping with both of the first electrode and the second electrode in a plan view, and
the first capacitive element is located closer to the semiconductor substrate than the signal line is.
2. The imaging device according to claim 1 , wherein the first electrode of the first capacitive element is coupled to either a voltage source or a ground.
3. The imaging device according to claim 1 , wherein the capacity circuit includes a second capacitive element coupled to the first capacitive element in series.
4. The imaging device according to claim 3 , wherein the second capacitive element is located closer to the semiconductor substrate than the signal line is.
5. The imaging device according to claim 1 , wherein
the region includes a diffusion region in the semiconductor substrate, at least a part of the signal charge being input into the diffusion region, and
the first capacitive element is overlapped with the diffusion region in a plan view.
6. The imaging device according to claim 1 , wherein each of the pixels includes a second transistor having a source and a drain, one of the source and the drain being coupled to a node between the first capacitive element and the second capacitive element, the other of the source and the drain being coupled to the gate of the first transistor.
7. The imaging device according to claim 1 , wherein the photoelectric converter is in the semiconductor substrate.
8. The imaging device according to claim 1 , wherein the first capacitive element is a MIM capacitor.
9. The imaging device according to claim 1 , wherein the first capacitive element is located above the semiconductor substrate.
10. The imaging device according to claim 3 , wherein the second capacitive element includes a third electrode, the gate of the first transistor, and an second insulating layer between the third electrode and the gate of the first transistor.
11. An imaging device comprising:
a semiconductor substrate;
pixels arranged in a first direction; and
a signal line that extends in the first direction, wherein each of the pixels includes
photoelectric converter that generates signal charge by photoelectric conversion,
a region into which the signal charge is input,
a first transistor that outputs a signal to the signal line according to an amount of the signal charge input into the region,
a capacity circuit that is coupled to a gate of the first transistor and that includes a first capacitive element, the first capacitive element including a first electrode, a second electrode and a first insulating layer between the first electrode and the second electrode, at least one of the first electrode and the second electrode containing a metal, the gate of the first transistor overlapping with both of the first electrode and the second electrode in a plan view, and
the signal line is located on an incident light side with respect to the first capacitive element.
12. The imaging device according to claim 11 , wherein the first electrode of the first capacitive element is coupled to either a voltage source or a ground.
13. The imaging device according to claim 11 , wherein the capacity circuit includes a second capacitive element coupled to the first capacitive element in series.
14. The imaging device according to claim 13 , wherein the second capacitive element is located closer to the semiconductor substrate than the signal line is.
15. The imaging device according to claim 11 , wherein
the region includes a diffusion region in the semiconductor substrate, at least a part of the signal charge being input into the diffusion region, and
the first capacitive element is overlapped with the diffusion region in a plan view.
16. The imaging device according to claim 11 , wherein each of the pixels includes a second transistor having a source and a drain, one of the source and the drain being coupled to a node between the first capacitive element and the second capacitive element, the other of the source and the drain being coupled to the gate of the first transistor.
17. The imaging device according to claim 11 , wherein the photoelectric converter is in the semiconductor substrate.
18. The imaging device according to claim 11 , wherein the first capacitive element is a MIM capacitor.
19. The imaging device according to claim 11 , wherein the first capacitive element is located above the semiconductor substrate.
20. The imaging device according to claim 13 , wherein the second capacitive element includes a third electrode, the gate of the first transistor, and an second insulating layer between the third electrode and the gate of the first transistor.