IP Library › Granted Patent US 11,190,137
Granted Patent B2
US 11,190,137 · App. 16/659,659 · Granted Nov 30, 2021

Amplifier, circuit for trimming a bias voltage, method for amplifying an input signal and method for trimming a bias voltage

Inventor: Anton Thoma (Munich, DE)
Assignee: ADVANTEST CORPORATION
H03F1/0205H03F1/301H03F3/211H03F2200/18H03F2200/21H03F2200/276H03F2200/393
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Quick Facts
Patent No.
US 11,190,137
App. No.
16/659,659
Granted
Nov 30, 2021
Kind
B2
Abstract

An amplifier includes an amplifying device and a bias circuit for providing a bias voltage for the amplifying device. The bias circuit is configured to provide the bias voltage in dependence of an output signal of an optical coupling arrangement which provides for electrical isolation.

Claims (44)

1. An amplifier, comprising:

an amplifying device;

an optical coupling arrangement operable to generate an output signal and to provide an electrical isolation; and

a bias circuit for providing a bias voltage for the amplifying device based on the output signal,

wherein the bias circuit is configured to adjust the bias voltage based on the output signal of the optical coupling arrangement when an operating point of the amplifying device deviates from a desired operating point during operation of the amplifying device.

2. The amplifier according to claim 1 , wherein the bias circuit comprises a first resistor coupled in parallel to the optical coupling arrangement, wherein the amplifying device comprises a control terminal, wherein the first resistor is coupled to the control terminal of the amplifying device, and wherein the optical coupling arrangement is configured to provide a contribution to a voltage drop across the first resistor, wherein the voltage drop across the first resistor is configured to adjust the bias voltage.

3. The amplifier according to claim 2 wherein the bias circuit comprises a regulator coupled in parallel to a resistor arrangement comprising the first resistor and a second resistor, wherein the second resistor is coupled in series to the first resistor, and wherein the regulator is configured to limit the bias voltage based on a second voltage drop across the second resistor.

4. The amplifier according to claim 3 , wherein the regulator is configured to limit the bias voltage by offering a low impedance path in parallel to the resistor arrangement comprising the first resistor and the second resistor through the regulator when the second voltage drop across the second resistor exceeds a limit.

5. The amplifier according to claim 3 , wherein the regulator is configured to limit the bias voltage based on a voltage at a middle node of the resistor arrangement that operates as a voltage divider, wherein the voltage divider comprises the first resistor and the second resistor, wherein a divider based voltage drop across the voltage divider provides the bias voltage, and wherein the divider-based voltage drop across the voltage divider is influenced by the output signal of the optical coupling arrangement.

6. The amplifier according to claim 1 , wherein the optical coupling arrangement is configured to receive a control signal to provide an optical signal based on the control signal and to provide the output signal of the optical coupling arrangement based on the optical signal, wherein the output signal of the optical coupling arrangement is electrically isolated from the control signal.

7. The amplifier according to claim 6 , wherein the optical coupling arrangement is configured to receive a pulse width-modulated control signal.

8. The amplifier according to claim 6 , wherein the amplifier is configured to adjust the control signal based on a cross current of the amplifying device.

9. The amplifier according to claim 6 , wherein the amplifier is configured to adjust the control signal based on a measurement of a characteristic of an amplifier output signal of the amplifier.

10. The amplifier according to claim 9 , wherein the amplifier is configured to measure the characteristic of the amplifier output signal of the amplifier by stepping through various bias voltage settings.

11. The amplifier according to claim 1 , wherein the amplifier further comprises:

a signal input line configured to receive an input signal to be amplified;

a positive supply voltage terminal; and

a negative supply voltage terminal, wherein the positive supply voltage terminal and the negative supply voltage terminal are configured to provide supply voltages to the amplifier, wherein the amplifying device comprises a control terminal, wherein the bias circuit is coupled between the signal input line and the control terminal of the amplifying device to allow for an optically isolated adjustment of a voltage shift between the signal input line and the control terminal.

12. The amplifier according to claim 11 , wherein the amplifier further comprises a first current source coupled between the positive supply voltage terminal and the bias circuit, wherein the first current source is configured to provide a predefined current to the bias circuit.

13. The amplifier according to claim 11 , wherein the amplifier further comprises a second current source and a second bias circuit, wherein the second current source is coupled between the negative supply voltage terminal and the second bias circuit, wherein the second current source is configured to provide a predefined current to the second bias circuit based on a voltage provided by the negative supply voltage terminal.

14. The amplifier according to claim 1 , wherein the amplifying device is configured to provide a positive output signal of the amplifier when a positive input signal is applied, wherein the positive output signal exhibits an equal or higher current relative to the positive input signal.

15. The amplifier according to claim 1 , wherein the amplifier further comprises a second amplifying device, wherein the second amplifying device is configured to provide a negative output signal of the amplifier when a negative input signal is applied to the amplifier, wherein the negative output signal exhibits an equal or higher current relative to the negative input signal.

16. A method for amplifying an input signal comprising:

providing an optical coupling arrangement operable to provide an electric isolation;

outputting an output signal from the optical coupling arrangement;

providing a bias voltage for an amplifying device based on the output signal; and

adjusting the bias voltage based on the output signal from the optical coupling arrangement when an operating point of the amplifying device deviates from a desired operating point during operation of the amplifying device.

17. A circuit for trimming a bias voltage, comprising:

a controlled source, wherein the controlled source is controlled via an optical control signal; and

a first resistor coupled to a control terminal of an amplifying device to provide the trimmed bias voltage to the amplifying device,

wherein the first resistor is coupled in parallel to the controlled source, and

wherein the controlled source is configured to change a voltage drop across the first resistor to trim the bias voltage based on a measurement of a characteristic of an output signal of the amplifying device during operation of the amplifying device.

18. The circuit according to claim 17 , wherein the circuit is configured to measure the characteristic of the output signal of the amplifying device by stepping through various bias trim settings.

19. The circuit according to claim 17 , wherein the circuit is configured to trim the bias voltage based on a cross current through the amplifying device.

20. The circuit according to claim 17 , wherein the circuit further comprises a signal input line, wherein the circuit for trimming the bias voltage is coupled between the signal input line for receiving an input signal to be amplified and a control terminal of the amplifying device, wherein a voltage between the signal input line and the control terminal serves to bias the amplifying device.

21. The circuit according to claim 17 , wherein the circuit further comprises a regulator coupled in parallel to a resistor arrangement comprising the first resistor and a second resistor, wherein the second resistor and the first resistor are coupled in series, and wherein the regulator is configured to limit the bias voltage based on a second voltage drop across the second resistor.

22. The circuit according to claim 21 , wherein the regulator is configured to limit the bias voltage by offering a low impedance path in parallel to the resistor arrangement comprising the first and the second resistor through the regulator when the second voltage drop across the second resistor exceeds a limit.

23. The circuit according to claim 21 , wherein the regulator is configured to limit the bias voltage based on a voltage at a middle node of the resistor arrangement that operates as a voltage divider, wherein the voltage divider comprises the first resistor and the second resistor, wherein a divider based voltage drop across the voltage divider provides the bias voltage, and wherein the divider-based voltage drop across the voltage divider is influenced by an output signal of the controlled source.

24. The circuit according to claim 17 , wherein the controlled source is configured to receive the optical control signal based on an electrical control signal and to provide an output signal of the controlled source based on the optical control signal, wherein the output signal of the controlled source is electrically isolated from the electrical control signal.

25. The circuit according to claim 17 , wherein the controlled source is configured to receive the optical control signal which is based on a pulse width-modulated electrical control signal.

26. A method for trimming a bias voltage comprising:

providing a controlled source;

controlling the controlled source via an optical signal; and

changing a voltage drop across a first resistor coupled in parallel to the controlled source to trim the bias voltage for an amplifying device using the controlled source based on a measurement of a characteristic of an output signal of the amplifying device during operation of the amplifying device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2019
From: THOMA, ANTON
To: ADVANTEST CORPORATION
Reel/Frame 050815/0149 →
Continuity (2)
Continuation PCTEP2017060254 · Apr 28, 2017
Related Publication 20200052653A1 · Feb 13, 2020
Cited By (1)
US 12,316,357