Asynchronous power loss recovery for memory devices
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to maintain a logical-to-physical (L2P) table, wherein a region of the L2P table is cached in a volatile memory; maintain a write count reflecting a number of bytes written to the memory device; maintain a cache miss count reflecting a number of cache misses with respect to a cache of the L2P table; responsive to determining that a value of a predetermined function of the write count and the cache miss count exceeds a threshold value, copy the region of the L2P table to a non-volatile memory.
1. A system comprising:
a memory device; and
a processing device, operatively coupled to the memory device, the processing device to:
maintain a logical-to-physical (L2P) table, wherein a region of the L2P table is cached in a volatile memory;
maintain a write count reflecting a number of bytes written to the memory device;
maintain a cache miss count reflecting a number of cache misses with respect to a cache of the L2P table;
responsive to determining that a value of a predetermined function of the write count and the cache miss count exceeds a threshold value, copy the region of the L2P table to a non-volatile memory.
2. The system of claim 1 , wherein the processing device is further to:
store, in the non-volatile memory, a metadata page associated with the region of the L2P table.
3. The system of claim 1 , wherein the write count is a sum of a first number of bytes written by a host to the memory device and a second number of bytes written by a garbage collector (GC) process to the memory device.
4. The system of claim 1 , wherein the processing device is further to:
reconstruct the L2P table after an asynchronous power loss (APL) event.
5. The system of claim 1 , wherein the processing device is further to:
maintain an L2P journal comprising a plurality of L2P journal entries, wherein each L2P journal entry reflects an update operation with respect to the L2P table.
6. The system of claim 1 , wherein the threshold value is calculated to keep a reconstruction time of the L2P table below a specified time threshold.
7. The system of claim 1 , wherein the threshold value is calculated to keep a write amplification (WA) rate of the memory device below a specified WA threshold.
8. A method comprising:
maintaining, by a controller managing a memory device, a logical-to-physical (L2P) table, wherein a region of the L2P table is cached in a volatile memory;
maintaining a write count reflecting a number of bytes written to the memory device;
maintaining a cache miss count reflecting a number of cache misses with respect to a cache of the L2P table;
responsive to determining that a value of a predetermined function of the write count and the cache miss count exceeds a threshold value, copying the region of the L2P table to a non-volatile memory.
9. The method of claim 8 , further comprising:
storing, in the non-volatile memory, a metadata page associated with the region of the L2P table.
10. The method of claim 8 , wherein the write count is a sum of a first number of bytes written by a host to the memory device and a second number of bytes written by a garbage collector (GC) process to the memory device.
11. The method of claim 8 , further comprising:
reconstructing the L2P table after an asynchronous power loss (APL) event.
12. The method of claim 8 , further comprising:
maintaining an L2P journal comprising a plurality of L2P journal entries, wherein each L2P journal entry reflects an update operation with respect to the L2P table.
13. The method of claim 8 , wherein the threshold value is calculated to keep a reconstruction time of the L2P table below a specified time threshold.
14. The method of claim 8 , wherein the threshold value is calculated to keep a write amplification (WA) rate of the memory device below a specified WA threshold.
15. A computer-readable non-transitory storage medium comprising executable instructions that, when executed by a processing device, cause the processing device to:
maintain a logical-to-physical (L2P) table, wherein a region of the L2P table is cached in a volatile memory;
maintain a write count reflecting a number of bytes written to a memory device;
maintain a cache miss count reflecting a number of cache misses with respect to a cache of the L2P table;
responsive to determining that a value of a predetermined function of the write count and the cache miss count exceeds a threshold value, copy the region of the L2P table to a non-volatile memory.
16. The computer-readable non-transitory storage medium of claim 15 , further comprising executable instructions that, when executed by the processing device, cause the processing device to:
store, in the non-volatile memory, a metadata page associated with the region of the L2P table.
17. The computer-readable non-transitory storage medium of claim 15 , wherein the write count is a sum of a first number of bytes written by a host to the memory device and a second number of bytes written by a garbage collector (GC) process to the memory device.
18. The computer-readable non-transitory storage medium of claim 15 , further comprising executable instructions that, when executed by the processing device, cause the processing device to:
reconstruct the L2P table after an asynchronous power loss (APL) event.
19. The computer-readable non-transitory storage medium of claim 15 , wherein the processing device is further to:
maintain an L2P journal comprising a plurality of L2P journal entries, wherein each L2P journal entry reflects an update operation with respect to the L2P table.
20. The computer-readable non-transitory storage medium of claim 15 , wherein the threshold value is calculated to keep, below a specified threshold, one of: a reconstruction time or a write amplification (WA) rate of the memory device.