Semiconductor device and manufacturing method
To provide a semiconductor device that has barrier metal and has a small variation in a threshold voltage. A semiconductor device is provided, including a semiconductor substrate, an interlayer dielectric film arranged on an upper surface of the semiconductor substrate, a titanium layer provided on the interlayer dielectric film, and a titanium nitride layer provided on the titanium layer, where the interlayer dielectric film is provided with an opening that exposes a part of the upper surface of the semiconductor substrate, the titanium layer and the titanium nitride layer are also provided within the opening, and the titanium layer arranged in contact with the semiconductor substrate and on a bottom portion of the opening is entirely titanium-silicided.
1. A semiconductor device comprising:
a semiconductor substrate;
an interlayer dielectric film arranged on an upper surface of the semiconductor substrate;
a titanium layer provided on the interlayer dielectric film; and
a titanium nitride layer provided on the titanium layer, wherein
the interlayer dielectric film is provided with an opening that exposes a part of the upper surface of the semiconductor substrate,
the titanium layer and the titanium nitride layer are provided also within the opening,
the titanium layer arranged in contact with the semiconductor substrate and on a bottom portion of the opening is entirely titanium-silicided,
a bottom surface of the titanium nitride layer in the opening being in contact with the titanium-silicided bottom portion of the titanium layer, and a lower portion of a side wall surface of the titanium nitride layer in the opening being in contact with a titanium-silicided side wall portion of the titanium layer,
a height of the titanium layer provided on the interlayer dielectric film and in a region other than the opening is 30 nm or larger and 45 nm or smaller, and
T 3 >T 2 , wherein
T 2 is a height from the upper surface of the substrate of the titanium-silicided portion of the titanium layer in the bottom portion of the opening of the interlayer dielectric film, and
T 3 is a distance that the titanium-silicided side wall portion of the titanium layer extends upwardly in the opening along a side wall of the interlayer dielectric film.
2. The semiconductor device according to claim 1 , further comprising a tungsten plug provided in the opening and on the titanium nitride layer.
3. The semiconductor device according to claim 2 , further comprising
a second titanium layer that is provided on the titanium nitride layer and on the tungsten plug, and that is not titanium-silicided.
4. The semiconductor device according to claim 1 , wherein
the titanium layer provided on the interlayer dielectric film and in a region other than the opening is a titanium layer that does not include a titanium-silicided portion.
5. The semiconductor device according to claim 1 , wherein
at least a part of a side wall of the interlayer dielectric film in the opening has an upwardly convex curved shape.
6. The semiconductor device according to claim 5 , wherein
the semiconductor substrate has:
a plurality of trench portions that are provided from the upper surface of the semiconductor substrate to inside the semiconductor substrate and are arranged in a predetermined array direction on the upper surface of the semiconductor substrate; and
a mesa portion that is sandwiched by two trench portions in the array direction,
the interlayer dielectric film is provided covering an upper end portion of at least some of the trench portions,
the opening is provided so as to expose an upper surface of at least some of mesa portions including the mesa portion, and
the side wall of the interlayer dielectric film has the curved shape above at least both end portions of the mesa portion in the array direction.
7. A semiconductor device comprising:
a semiconductor substrate;
an interlayer dielectric film arranged on an upper surface of the semiconductor substrate;
a titanium layer provided on the interlayer dielectric film;
a titanium nitride layer provided on the titanium layer;
a plurality of the openings; and
the titanium layer and the titanium nitride layer are continuously provided between adjacent ones of the plurality of openings, wherein
the interlayer dielectric film is provided with an opening that exposes a part of the upper surface of the semiconductor substrate,
the titanium layer and the titanium nitride layer are provided also within the opening,
the titanium layer arranged in contact with the semiconductor substrate and on a bottom portion of the opening is entirely titanium-silicided, and
a height of the titanium layer provided on the interlayer dielectric film and in a region other than the opening is 30 nm or larger and 45 nm or smaller.