IP Library Granted Patent US 11,201,465
Granted Patent B2
US 11,201,465 · App. 16/522,879 · Granted Dec 14, 2021

Semiconductor device

Inventor: Yasuyuki Morishita (Kodaira, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H02H9/044H01L27/0266
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Quick Facts
Patent No.
US 11,201,465
App. No.
16/522,879
Granted
Dec 14, 2021
Kind
B2
Abstract

A semiconductor device including a digital circuit, a first ground potential line provided corresponding to the digital circuit, an analog circuit, a second ground potential line respectively provided corresponding to the analog circuit, and a bidirectional diode group provided between the first ground potential line and the second ground potential line.

Claims (57)

1. A semiconductor device comprising:

a first digital circuit and a second digital circuit;

a first ground potential line provided corresponding to the first digital circuit;

a second ground potential line provided corresponding to the second digital circuit;

an analog circuit;

a third ground potential line provided corresponding to the analog circuit;

a first impedance element connected between the first ground potential line and the second ground potential line; and

a second impedance element provided between the second ground potential line and the third ground potential line;

a first clamp element connected between an input of the second digital circuit and the second ground potential line; and

a second clamp element connected between an input of the analog circuit to the third ground potential line,

wherein a size of the second clamp element is greater than a size of the first clamp element, and

wherein the second impedance element has higher impedance than an impedance of the first impedance element.

2. The semiconductor device according to claim 1 ,

wherein the first impedance element comprises a first bidirectional diode group,

wherein the second impedance element comprises a second bidirectional diode group, and

wherein a number of stages of the second bidirectional diode group is greater than a number of stages of the first bidirectional diode group.

3. The semiconductor device according to claim 2 ,

wherein the first bidirectional diode group comprises a first bidirectional diode, and

wherein the second bidirectional diode group comprises a plurality of second bidirectional diodes.

4. The semiconductor device according to claim 1 ,

wherein the first clamp element electrically connects the input of the second digital circuit to the second ground potential line corresponding to a potential difference between the input of the second digital circuit and the second ground potential line, and

wherein the second clamp element electrically connects the input of the analog circuit to the third ground potential line corresponding to a potential difference between the input of the analog circuit and the third ground potential line.

5. The semiconductor device according to claim 4 , wherein the input of the analog circuit is connected to an output of the second digital circuit.

6. The semiconductor device according to claim 5 , wherein the input of the second digital circuit is connected to an output of the first digital circuit.

7. The semiconductor device according to claim 1 ,

wherein the second clamp element is configured to short-circuit the input of the analog circuit and the third ground potential line based on a potential of the input of the analog circuit and a potential of the third ground potential line.

8. The semiconductor device according to claim 7 , wherein the input of the analog circuit is connected to an output of the second digital circuit.

9. The semiconductor device according to claim 8 , wherein the input of the second digital circuit is connected to an output of the first digital circuit.

10. A semiconductor device comprising:

a first digital circuit;

a second digital circuit;

a first ground potential line connected to the first digital circuit;

a second ground potential line connected to the second digital circuit;

an analog circuit;

a third ground potential line connected to the analog circuit;

a first impedance element connected to the first ground potential line and the second ground potential line;

a second impedance element connected to the second ground potential line and the third ground potential line; and

a first clamp element connected between an input of the second digital circuit and the second ground potential line; and

a second clamp element connected between an input of the analog circuit to the third ground potential line,

wherein a size of the second clamp element is greater than a size of the first clamp element, and

wherein the second impedance element has higher impedance than an impedance of the first impedance element.

11. The semiconductor device according to claim 10 ,

wherein the first impedance element includes a first bidirectional diode group,

wherein the second impedance element includes second bidirectional diode group, and

wherein a number of stages of the second bidirectional diode group is greater than a number of stages of the first bidirectional diode group.

12. The semiconductor device according to claim 11 ,

wherein the first bidirectional diode group includes a first bidirectional diode, and

wherein the second bidirectional diode group includes a plurality of second bidirectional diodes.

13. The semiconductor device according to claim 12 ,

wherein the first clamp element electrically connects the input of the second digital circuit to the second ground potential line corresponding to a potential difference between the input of the second digital circuit and the second ground potential line, and

wherein the second clamp element electrically connects the input of the analog circuit to the third ground potential line corresponding to a potential difference between the input of the analog circuit and the third ground potential line.

14. The semiconductor device according to claim 13 , wherein the input of the analog circuit is connected to an output of the second digital circuit.

15. The semiconductor device according to claim 14 , wherein the input of the second digital circuit is connected to an output of the first digital circuit.

16. The semiconductor device according to claim 10 ,

wherein the second clamp element is configured to short-circuit the input of the analog circuit and the third ground potential line based on a potential of the input of the analog circuit and a potential of the third ground potential line.

17. The semiconductor device according to claim 16 , wherein the input of the analog circuit is connected to an output of the second digital circuit.

18. The semiconductor device according to claim 17 , wherein the input of the second digital circuit is connected to an output of the first digital circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 5, 2021
From: MORISHITA, YASUYUKI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 057387/0842 →
Priority Claims (1)
JP 2016-094296 · May 10, 2016 · national
Continuity (2)
Continuation 15469450 · Mar 24, 2017
Related Publication 20190348835A1 · Nov 14, 2019