IP Library › Granted Patent US 11,212,762
Granted Patent B2
US 11,212,762 · App. 16/638,004 · Granted Dec 28, 2021

Methods and apparatuses for synchronization signal transmission

Inventors: Yukai Gao (Beijing, CN); Gang Wang (Beijing, CN)
Assignee: NEC CORPORATION
H04W56/001H04L5/0051H04L5/0094H04L5/10H04W72/005H04W72/0446
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,212,762
App. No.
16/638,004
Granted
Dec 28, 2021
Kind
B2
Abstract

Embodiments of the present disclosure relate to methods and an apparatuses for synchronization signal (SS) transmission. In example embodiments, a method implemented in a network device is provided. According to the method, information on a plurality of SS blocks to be transmitted by the network device is determined based on at least one of a frequency range and a value of subcarrier spacing. The information at least in part indicates timing for transmitting the plurality of SS blocks The plurality of SS blocks are transmitted to at least one terminal device based on the determined information.

Claims (63)

1. A network device comprising a processor configured to:

generate DMRS (DeModulation Reference Signal) sequences for PBCH (Physical Broadcast CHannel); and

transmit, to a terminal, SS (Synchronization Signals) blocks in the frame, wherein

the PBCH is included in the SS blocks, wherein

one of the DMRS sequences in 1st-half of the frame is different from one of the DMRS sequences in 2nd-half of the frame,

the maximum number of the SS blocks within the 1st-half or the 2nd-half duration of the frame is 4,

the DMRS sequences is 8 DMRS sequences, wherein

4 DMRS sequences of the 8 DMRS sequences is in the 1st-half of the frame, and

the other 4 DMRS sequences of the 8 DMRS sequences is in the 2nd-half of the frame, and

the 4 DMRS sequences in the 1st-half of the frame is different from the other 4 DMRS sequences in the 2nd-half of the frame.

2. The network device according to claim 1 , wherein

an initial value for generating the one of the DMRS sequences in the 1st-half of the frame is different from an initial value for generating the one of the DMRS sequences in the 2nd-half of the frame.

3. The network device according to claim 1 , wherein

the SS blocks is included in one of the 1st-half of the frame or the 2nd-half of the frame.

4. The network device according to claim 1 , wherein

initial values for generating the 4 DMRS sequences in the 1st-half of the frame is different from initial values for generating the other 4 DMRS sequences in the 2st-half of the frame.

5. A terminal comprising a processor configured to:

receive, from a network device, SS (Synchronization Signals) blocks in a frame; and

detect DMRS (DeModulation Reference Signal) sequences for PBCH (Physical Broadcast CHannel), wherein

the PBCH is included in the SS blocks, wherein

one of the DMRS sequences in 1st-half of the frame is different from one of the DMRS sequences in 2nd-half of the frame,

the maximum number of the SS blocks within the 1st-half or the 2nd-half duration of the frame is 4,

the DMRS sequences is 8 DMRS sequences, wherein

4 DMRS sequences of the 8 DMRS sequences is in the 1st-half of the frame; and

the other 4 DMRS sequences of the 8 DMRS sequences is in the 2nd-half of the frame, and

the 4 DMRS sequences in the 1st-half of the frame is different from the other 4 DMRS sequences in the 2nd-half of the frame.

6. The terminal according to claim 5 , wherein

an initial value for generating the one of the DMRS sequences in the 1st-half of the frame is different from an initial value for generating the one of the DMRS sequences in the 2nd-half of the frame.

7. The terminal according to claim 5 , wherein

the SS blocks is included in one of the 1st-half of the frame or the 2nd-half of the frame.

8. The terminal according to claim 5 , wherein

initial values for generating the 4 DMRS sequences in the 1st-half of the frame is different from initial values for generating the other 4 DMRS sequences in the 2st-half of the frame.

9. A method comprising:

generating DMRS (DeModulation Reference Signal) sequences for PBCH (Physical Broadcast CHannel); and

transmitting SS (Synchronization Signals) blocks in the frame, wherein

the PBCH is included in the SS blocks, wherein

one of the DMRS sequences in 1st-half of the frame is different from one of the DMRS sequences in 2nd-half of the frame,

the maximum number of the SS blocks within the 1st-half or the 2nd-half duration of the frame is 4,

the DMRS sequences is 8 DMRS sequences, wherein

4 DMRS sequences of the 8 DMRS sequences is in the 1st-half of the frame; and

the other 4 DMRS sequences of the 8 DMRS sequences is in the 2nd-half of the frame, and

the 4 DMRS sequences in the 1st-half of the frame is different from the other 4 DMRS sequences in the 2nd-half of the frame.

10. The method according to claim 9 , wherein

an initial value for generating the one of the DMRS sequences in the 1st-half of the frame is different from an initial value for generating the one of the DMRS sequences in the 2nd-half of the frame.

11. The method according to claim 9 , wherein

the SS blocks is included in one of the 1st-half of the frame or the 2nd-half of the frame.

12. The method according to claim 9 , wherein

initial values for generating the 4 DMRS sequences in the 1st-half of the frame is different from initial values for generating the other 4 DMRS sequences in the 2st-half of the frame.

13. A method comprising:

receiving SS (Synchronization Signals) blocks in a frame; and

detecting DMRS (DeModulation Reference Signal) sequences for PBCH (Physical Broadcast CHannel), wherein

the PBCH is included in the SS blocks, wherein

one of the DMRS sequences in 1st-half of the frame is different from one of the DMRS sequences in 2nd-half of the frame,

the maximum number of the SS blocks within the 1st-half or the 2nd-half duration of the frame is 4,

the DMRS sequences is 8 DMRS sequences, wherein

4 DMRS sequences of the 8 DMRS sequences is in the 1st-half of the frame; and

the other 4 DMRS sequences of the 8 DMRS sequences is in the 2nd-half of the frame, and

the 4 DMRS sequences in the 1st-half of the frame is different from the other 4 DMRS sequences in the 2nd-half of the frame.

14. The method according to claim 13 , wherein

an initial value for generating the one of the DMRS sequences in the 1st-half of the frame is different from an initial value for generating the one of the DMRS sequences in the 2nd-half of the frame.

15. The method according to claim 13 , wherein the SS blocks is included in one of the 1st-half of the frame or the 2nd-half of the frame.

16. The method according to claim 13 , wherein

initial values for generating the 4 DMRS sequences in the 1st-half of the frame is different from initial values for generating the other 4 DMRS sequences in the 2st-half of the frame.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2020
From: GAO, YUKAI; WANG, GANG
To: NEC CORPORATION
Reel/Frame 051869/0852 →
Continuity (1)
Related Publication 20200221403A1 · Jul 9, 2020