IP Library Granted Patent US 11,216,279
Granted Patent B2
US 11,216,279 · App. 16/200,491 · Granted Jan 4, 2022

Loop exit predictor

Inventors: Anthony Jarvis (Boxborough, MA); Thomas Clouqueur (Boxborough, MA)
Assignee: Advanced Micro Devices, Inc.
G06F9/3848G06F9/30065G06F9/325
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Quick Facts
Patent No.
US 11,216,279
App. No.
16/200,491
Granted
Jan 4, 2022
Kind
B2
Abstract

A processor includes a prediction engine coupled to a training engine. The prediction engine includes a loop exit predictor. The training engine includes a loop exit branch monitor coupled to a loop detector. Based on at least one of a plurality of call return levels, the loop detector of the processor takes a snapshot of a retired predicted block during a first retirement time, compares the snapshot to a subsequent retired predicted block at a second retirement time, and based on the comparison, identifies a loop and loop exit branches within the loop for use by the loop exit branch monitor and the loop exit predictor to determine whether to override a general purpose conditional prediction.

Claims (39)

1. A method comprising:

assigning a confidence level to a loop exit prediction generated by a loop exit predictor, the confidence level indicating a confidence that a loop will exit; and

overriding a general purpose conditional prediction of a general purpose conditional predictor based on said confidence level exceeding a confidence level threshold.

2. The method of claim 1 , further comprising:

generating said confidence level by determining a loop iteration count based on loop exit branches identified in a loop determined by a loop detector.

3. The method of claim 2 , further comprising:

monitoring said loop iteration count to determine a loop iteration count repeat frequency to generate said confidence level.

4. The method of claim 3 , further comprising:

determining whether said loop is occurring using a snapshot of a retired predicted block and a subsequent retired predicted block during a retirement time.

5. The method of claim 4 , wherein said snapshot includes an address tag, a descriptor, and a direction of said retired predicted block.

6. The method of claim 5 , wherein said subsequent retired predicted block includes an address tag, a descriptor, and a direction of said subsequent retired predicted block.

7. The method of claim 1 , wherein a multiplexer is used for overriding said general purpose conditional prediction.

8. The method of claim 4 , wherein said snapshot is taken periodically.

9. A processor, comprising:

a prediction engine including a loop exit predictor; and

a training engine coupled to said prediction engine, said training engine including a loop exit branch monitor coupled to a loop detector,

wherein:

based on at least one of a plurality of call return levels, said loop detector of said processor takes a snapshot of a retired predicted block during a first retirement time, compares said snapshot to a subsequent retired predicted block at a second retirement time, and based on said comparison,

identifies a loop and loop exit branches within said loop for use by said loop exit branch monitor and said loop exit predictor to determine whether to override a general purpose conditional prediction.

10. The processor of claim 9 , wherein said loop exit branch monitor determines a loop iteration count based on said loop exit branches.

11. The processor of claim 10 , wherein said loop exit branch monitor monitors said loop iteration count to determine a loop iteration count repeat frequency.

12. The processor of claim 11 , wherein said loop exit predictor uses said loop iteration count repeat frequency to generate a loop exit prediction confidence level.

13. The processor of claim 12 , wherein said loop exit prediction confidence level is used to override said general purpose conditional prediction.

14. The processor of claim 9 , wherein said snapshot includes an address tag, a descriptor, and a direction of said retired predicted block.

15. The processor of claim 9 , further comprising a processing pipeline coupled to said training engine to provide said retired predicted block and said subsequent retired predicted block to said training engine.

16. The processor of claim 9 , wherein said plurality of call return levels is limited to four and each call return level in said plurality of call return levels includes at least one said loop detector.

17. The processor of claim 9 , further comprising:

a multiplexer coupled to said loop exit predictor; and

a general purpose conditional predictor coupled to said multiplexer, wherein said multiplexer is triggered by said loop exit predictor to override said general purpose conditional predictor when a determination is made by said loop exit predictor to override said general purpose conditional prediction.

18. A method comprising:

based on a call return level, taking a snapshot of a retired predicted block during a first retirement time;

comparing said snapshot of said retired predicted block to a subsequent retired predicted block to determine when a loop is occurring;

when said loop is occurring, identifying loop exit branches in said loop which exit from said loop;

determining a loop iteration count based on said loop exit branches;

monitoring said loop iteration count to determine a loop iteration count repeat frequency; and

overriding a general purpose conditional prediction based on said monitoring of said loop iteration count.

19. The method of claim 18 , further comprising:

using said loop iteration count repeat frequency to ascertain a loop exit prediction confidence level.

20. The method of claim 19 , wherein overriding said general purpose conditional prediction occurs when said loop exit prediction confidence level passes a confidence level threshold.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2018
From: JARVIS, ANTHONY; CLOUQUEUR, THOMAS
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 047639/0224 →
Continuity (1)
Related Publication 20200167164A1 · May 28, 2020