IP Library Granted Patent US 11,217,308
Granted Patent B1
US 11,217,308 · App. 16/993,795 · Granted Jan 4, 2022

Programming memory cells using asymmetric current pulses

Inventors: Mattia Robustelli (Milan, IT); Innocenzo Tortorelli (Cernusco Sul Naviglio, IT); Richard K. Dodge (Santa Clara, CA)
Assignee: Micron Technology
G11C13/0069G11C13/0004G11C2013/0092
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Quick Facts
Patent No.
US 11,217,308
App. No.
16/993,795
Granted
Jan 4, 2022
Kind
B1
Abstract

The present disclosure includes apparatuses and methods for programming memory cells using asymmetric current pulses. An embodiment includes a memory having a plurality of self-selecting memory cells, and circuitry configured to program a self-selecting memory cell of the memory by applying a first current pulse or a second current pulse to the self-selecting memory cell, wherein the first current pulse is applied for a longer amount of time than the second current pulse and the first current pulse has a lower amplitude than the second current pulse.

Claims (52)

1. An apparatus, comprising:

a memory having a plurality of self-selecting memory cells; and

circuitry configured to program a self-selecting memory cell of the memory by:

applying a first current pulse or a second current pulse to the self-selecting memory cell, wherein:

the first current pulse is applied for a longer amount of time than the second current pulse; and

the first current pulse has a lower amplitude than the second current pulse; and

applying a third current pulse and a fourth current pulse to the self-selecting memory cell.

2. The apparatus of claim 1 , wherein the self-selecting memory cells include a chalcogenide material.

3. The apparatus of claim 1 , wherein the first current pulse is a set pulse.

4. The apparatus of claim 1 , wherein the second current pulse is a reset pulse.

5. The apparatus of claim 1 , wherein the first current pulse has a negative polarity.

6. The apparatus of claim 5 , wherein applying the first current pulse decreases a magnitude of a threshold voltage (Vt) of the self-selecting memory cell.

7. The apparatus of claim 1 , wherein the second current pulse has a positive polarity.

8. The apparatus of claim 7 , wherein applying the second current pulse increases a magnitude of a threshold voltage (Vt) of the self-selecting memory cell.

9. An apparatus, comprising:

a memory having a plurality of self-selecting memory cells; and

circuitry configured to program a self-selecting memory cell of the memory by:

applying a first current pulse, or a second current pulse to the self-selecting memory cell, wherein:

the second current pulse is applied for a shorter amount of time than the first current pulse;

the second current pulse has a greater amplitude than the first current pulse; and

the second current pulse has an opposite polarity than the first current pulse; and

applying a third current pulse and a fourth current pulse to the self-selecting memory cell, wherein the third current pulse has an opposite polarity of whichever one of the first current pulse or the second pulse that is applied to the self-selecting memory cell and the fourth current pulse has an opposite polarity of the third current pulse.

10. The apparatus of claim 9 , wherein applying the first current pulse and the second current pulse to the self-selecting memory cell increases a difference between a magnitude of a first threshold voltage (Vt) of the self-selecting memory cell and a magnitude of a second Vt of the self-selecting memory cell by a range of approximately 20-30%.

11. The apparatus of claim 9 , wherein the first current pulse has an amplitude of 30 microAmps (μA) or less.

12. The apparatus of claim 9 , wherein the first current pulse is applied to the self-selecting memory cell for 60 nanoseconds (ns) or more.

13. The apparatus of claim 9 , wherein the second current pulse is applied to the self-selecting memory cell for 20 nanoseconds (ns) or less.

14. The apparatus of claim 9 , wherein the second current pulse is applied to the self-selecting memory cell for approximately 40 nanoseconds (ns).

15. The apparatus of claim 9 , wherein the second current pulse has an amplitude of approximately 60 microAmps (μA).

16. A method, comprising:

programming a self-selecting memory cell by:

applying a first current pulse to the self-selecting memory cell or applying a second current pulse to the self-selecting memory cell, wherein:

an amplitude of the second pulse is higher than an amplitude of the first pulse;

the second pulse is applied for a shorter amount of time than the first pulse; and

the second pulse has an opposite polarity than the first pulse; and

applying a third current pulse and a fourth current pulse to the self-selecting memory cell.

17. The method of claim 16 , wherein:

applying the first current pulse to the self-selecting memory cell programs the self-selecting memory cell to a first data state; and

applying the second current pulse to the self-selecting memory cell programs the self-selecting memory cell to a second data state.

18. The method of claim 17 , wherein applying the third current pulse to the self-selecting memory cell programs the self-selecting memory cell to an opposite data state of whichever of the first data state or the second data state in which the self-selecting memory cell is programmed.

19. A method, comprising:

applying a first current pulse to a self-selecting memory cell; or

applying a second current pulse to the self-selecting memory cell, wherein:

the second current pulse is applied for a shorter amount of time than the first current pulse;

the second current pulse has a higher amplitude than the first current pulse; and

the second current pulse has an opposite polarity than the first current pulse; and

applying a third current pulse and a fourth current pulse to the self-selecting memory cell.

20. The apparatus of claim 19 , wherein the first current pulse and the second current pulse are applied for a same amount of time and have different amplitudes.

21. The apparatus of claim 19 , wherein the first current pulse and the second current pulse are applied for different amounts of time and have a same amplitude.

22. The apparatus of claim 19 , wherein the first pulse and the third pulse are applied for a same amount of time and have a same amplitude.

23. The apparatus of claim 19 , wherein the second current pulse and the third current pulse are applied for a same amount of time and have different amplitudes.

24. The apparatus of claim 19 , wherein the third current pulse and the fourth current pulse are applied for a same amount of time and have different amplitudes.

25. The apparatus of claim 19 , wherein the third current pulse and the fourth current pulse are applied for different amounts of time and have a same amplitude.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2020
From: ROBUSTELLI, MATTIA; TORTORELLI, INNOCENZO; DODGE, RICHARD K.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 053499/0343 →
Cited By (2)
US 12,237,047 US 12,367,933