IP Library Granted Patent US 11,217,542
Granted Patent B2
US 11,217,542 · App. 16/926,606 · Granted Jan 4, 2022

Three-dimensional module with integrated passive components

Inventors: Guobiao Zhang (Corvallis, OR); Hongyu Yu (Shenzhen, CN); Yuejin Guo (Shenzhen, CN); Shengming Zhou (Shenzhen, CN); Guoxing Zhang (Shenzhen, CN); Guangzhao Liu (Shenzhen, CN); Mingtao Hu (Shenzhen, CN); Wang Zhang (Shenzhen, CN)
Assignee: Southern University of Science and Technology
H01L23/642H01L21/4853H01L21/4857H01L21/6835H01L23/5383H01L23/5385H01L23/5386H01L23/5389H01L28/92H01L2221/68372
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,217,542
App. No.
16/926,606
Granted
Jan 4, 2022
Kind
B2
Abstract

A three-dimensional (3-D) module with integrated passive components includes a plurality of vertically stacked sub-modules. Each sub-module comprises a device level comprising a high-k dielectric (e.g. ceramic) material and an interconnect level comprising a low-k dielectric (e.g. organic) material. The passive components in the device level are fired integrally, whereas the device level and the interconnect level are fired independently.

Claims (15)

1. A module with integrated passive components, comprising a first capacitor at a first location on a device level and a second capacitor at a second location on said device level, wherein:

said first capacitor comprises a first ceramic body, a pair of first external electrodes, and a plurality of first internal electrodes extending from said first external electrodes into said first ceramic body in a first interleaving manner;

said second capacitor comprise a second ceramic body, a pair of second external electrodes, and a plurality of second internal electrodes extending from said second external electrodes into said second ceramic body in a second interleaving manner;

said first and second ceramic bodies comprise a same ceramic material; said first capacitor has a smaller capacitance value than said second capacitor; said first internal electrodes is smaller in number than said second internal electrodes;

the lower surfaces of said first and second capacitors are co-planar; and, the upper surfaces of said first and second capacitors are co-planar.

2. A module with integrated passive components, comprising a first capacitor at a first location on a device level and a second capacitor at a second location on said device level, wherein:

said first capacitor comprises a first ceramic body with a capacitive portion and a dummy portion, a pair of first external electrodes, and a plurality of first internal electrodes extending from said first external electrodes into said capacitive portion in a first interleaving manner, wherein said dummy portion does not comprise any of said first internal electrodes;

said second capacitor comprise a second ceramic body without any dummy portion, a pair of second external electrodes, and a plurality of second internal electrodes extending from said second external electrodes into said second ceramic body in a second interleaving manner;

said first and second ceramic bodies comprise a same ceramic material; said first capacitor has a smaller capacitance value than said second capacitor;

the lower surfaces of said first and second capacitors are co-planar; and, the upper surfaces of said first and second capacitors are co-planar.

3. A module with integrated passive components, comprising a first capacitor at a first location on a device level and a second capacitor at a second location on said device level, wherein:

said first capacitor comprises a first ceramic body with a capacitive portion and a dummy portion, a pair of first external electrodes, and a plurality of first internal electrodes extending from said first external electrodes into said capacitive portion in a first interleaving manner, wherein said dummy portion does not comprise any of said first internal electrodes;

said second capacitor comprise a second ceramic body without any dummy portion, a pair of second external electrodes, and a plurality of second internal electrodes extending from said second external electrodes into said second ceramic body in a second interleaving manner;

said first and second ceramic bodies comprise a same ceramic material; said first capacitor has a smaller capacitance value than said second capacitor;

each of said first internal electrodes is co-planar with a selected one of said second internal electrodes.

Priority Claims (1)
CN 201910619802.3 · Jul 10, 2019 · national
Continuity (1)
Related Publication 20210013162A1 · Jan 14, 2021
Cited By (1)
US 12,347,604