IP Library Granted Patent US 11,217,652
Granted Patent B2
US 11,217,652 · App. 16/820,470 · Granted Jan 4, 2022

Display device with fan-out lines in reduced peripheral area

Inventors: Yujin Jeon (Yongin-si, KR); Wonse Lee (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
H01L27/3276H01L27/3248
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Quick Facts
Patent No.
US 11,217,652
App. No.
16/820,470
Granted
Jan 4, 2022
Kind
B2
Abstract

A display device includes: a substrate including a display area, a peripheral area, and a pad area, a plurality of pixels in the display area, and the peripheral area surrounding the display area; a plurality of fan-out lines extending from the pad area to the display area; a first metal layer covering at least a portion of the plurality of fan-out lines in the peripheral area; a second metal layer overlapping at least a portion of the first metal layer, the second metal layer being over the first metal layer; a third metal layer over the second metal layer in the peripheral area; a first insulating layer between the first metal layer and the second metal layer and including first contact holes; and a second insulating layer between the second metal layer and the third metal layer and including second contact holes.

Claims (63)

1. A display device comprising:

a substrate including a display area, a peripheral area, and a pad area outside the peripheral area, a plurality of pixels in the display area, and the peripheral area surrounding the display area;

a plurality of fan-out lines extending from the pad area to the display area across the peripheral area, the plurality of fan-out lines being configured to transfer an image signal to the plurality of pixels;

a first metal layer covering at least a portion of the plurality of fan-out lines in the peripheral area;

a second metal layer overlapping at least a portion of the first metal layer, the second metal layer being over the first metal layer;

a third metal layer over the second metal layer in the peripheral area;

a first insulating layer between the first metal layer and the second metal layer and including first contact holes;

a second insulating layer between the second metal layer and the third metal layer and including second contact holes; and

a third insulating layer between the plurality of fan-out lines and the first metal layer,

wherein the first metal layer and the second metal layer contact each other in the first contact hole, the second metal layer and the third metal layer contact each other in the second contact hole.

2. The display device of claim 1 ,

wherein the second contact holes are between the first contact holes that neighbor each other.

3. The display device of claim 1 , wherein

the third insulating layer has grooves, the grooves corresponding to an intermediate area between neighboring the plurality of fan-out lines, and

the first contact holes are in between neighboring the grooves.

4. The display device of claim 1 , wherein

the third insulating layer has grooves, the grooves corresponding to an intermediate area between neighboring the plurality of fan-out lines, and

the first metal layer and the second metal layer contact each other in the grooves.

5. The display device of claim 1 , wherein at least one of the first insulating layer or the second insulating layer includes an organic insulating material.

6. The display device of claim 1 , wherein

the second metal layer includes a plurality of holes apart from the first contact holes, and

the second contact holes are apart from each of the first contact holes and the plurality of holes.

7. The display device of claim 6 , wherein the plurality of holes have a size greater than those of the first contact holes and the second contact holes.

8. The display device of claim 1 , wherein the first contact holes have an area greater than those of the second contact holes.

9. The display device of claim 1 , wherein

the plurality of pixels include:

a thin film transistor;

a pixel electrode electrically connected to at least one of a source electrode or a drain electrode of the thin film transistor;

an opposite electrode over the pixel electrode; and

an emission layer between the pixel electrode and the opposite electrode.

10. The display device of claim 9 , wherein the third metal layer constitutes one body with the opposite electrode.

11. The display device of claim 9 , wherein the first metal layer is on the same layer as a layer on which the source electrode and the drain electrode of the thin film transistor are arranged.

12. The display device of claim 9 , wherein at least some of the plurality of fan-out lines are on the same layer as a layer on which a gate electrode of the thin film transistor is arranged.

13. The display device of claim 9 , further comprising:

an auxiliary metal connecting the pixel electrode to at least one of the source electrode or the drain electrode of the thin film transistor,

wherein the second metal layer is on the same layer as a layer on which the auxiliary metal is arranged.

14. The display device of claim 1 , wherein

the plurality of fan-out lines include a first fan-out line and a second fan-out line,

the first fan-out line and the second fan-out line being on different layers.

15. A display device comprising:

a substrate including a display area, a peripheral area, and a pad area outside the peripheral area, a plurality of pixels in the display area, and the peripheral area surrounding the display area;

a plurality of fan-out lines extending from the pad area to the display area across the peripheral area, the plurality of fan-out lines being apart from each other in a first direction in the peripheral area;

a first metal layer covering at least a portion of the plurality of fan-out lines in the peripheral area;

a second metal layer overlapping at least a portion of the first metal layer, the second metal layer being over the first metal layer in the peripheral area;

an opposite electrode in common over the plurality of pixels, the opposite electrode being over the second metal layer;

a first insulating layer between the first metal layer and the second metal layer and including first contact holes;

a second insulating layer between the second metal layer and the opposite electrode and including second contact holes; and

a third insulating layer between the plurality of fan-out lines and the first metal layer and including grooves corresponding to an intermediate area between the plurality of fan-out lines that neighbor each other,

wherein a separation distance in a first distance between the first contact holes and the grooves is different from a separation distance in the first direction between the second contact holes and the grooves.

16. The display device of claim 15 , wherein

the second metal layer includes a plurality of holes apart from each other, and

a separation distance in the first direction between the first contact holes and the plurality of holes is different from a separation distance in the first direction between the second contact holes and the plurality of holes.

17. The display device of claim 16 , wherein the plurality of fan-out lines include a first fan-out line and a second fan-out line,

the first fan-out line and the second fan-out line being on different layers.

18. The display device of claim 15 , wherein the plurality of pixels include:

a thin film transistor;

a pixel electrode electrically connected to at least one of a source electrode or a drain electrode of the thin film transistor; and

an emission layer between the pixel electrode and the opposite electrode.

19. The display device of claim 18 , wherein the first metal layer is on the same layer as a layer on which the source electrode and the drain electrode of the thin film transistor are arranged.

20. The display device of claim 18 , wherein at least some of the plurality of fan-out lines are on the same layer as a layer on which a gate electrode of the thin film transistor is arranged.

21. The display device of claim 18 , further comprising:

an auxiliary electrode connecting the pixel electrode to at least one of the source electrode or the drain electrode of the thin film transistor,

wherein the second metal layer is on the same layer as a layer on which the auxiliary electrode is arranged.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2020
From: JEON, YUJIN; LEE, WONSE
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 052129/0203 →
Priority Claims (1)
KR 10-2019-0038605 · Apr 2, 2019 · national
Continuity (1)
Related Publication 20200321421A1 · Oct 8, 2020
Cited By (1)
US 12,720,865