IP Library › Granted Patent US 11,227,940
Granted Patent B2
US 11,227,940 · App. 16/803,089 · Granted Jan 18, 2022

Fin field-effect transistor device and method of forming the same

Inventors: Jian-Jou Lian (Tainan, TW); Chun-Neng Lin (Hsinchu County, TW); Ming-Hsi Yeh (Hsinchu, TW); Chieh-Wei Chen (Taoyuan, TW); Tzu-Ang Chiang (I-lan, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L29/6681H01L21/845H01L29/7854
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Quick Facts
Patent No.
US 11,227,940
App. No.
16/803,089
Granted
Jan 18, 2022
Kind
B2
Abstract

A method of forming a semiconductor device includes removing a dummy gate from over a semiconductor fin; depositing a glue layer and a fill metal over the semiconductor fin; and simultaneously etching the glue layer and the fill metal with a wet etching solution, the wet etching solution etching the glue layer at a faster rate than the fill metal and reshaping the fill metal.

Claims (38)

1. A method of forming a semiconductor device, the method comprising:

removing a dummy gate from over a semiconductor fin;

depositing a glue layer and a fill metal over the semiconductor fin; and

simultaneously etching the glue layer and the fill metal with a wet etching solution, the wet etching solution etching the glue layer at a faster rate than the fill metal and reshaping the fill metal, wherein sidewalls of the fill metal extend above the glue layer after the simultaneously etching the glue layer and the fill metal.

2. The method of claim 1 , wherein the glue layer comprises titanium nitride and the fill metal comprises tungsten.

3. The method of claim 2 , wherein after the reshaping the fill metal the fill metal has a width of between about 2 nm and about 10 nm.

4. The method of claim 3 , wherein after the reshaping the fill metal the fill metal has a height of between about 5 nm and about 25 nm.

5. The method of claim 1 , wherein the wet etching solution comprises:

an etchant;

an oxidant; and

a stabilizer.

6. The method of claim 5 , wherein the oxidant is perchloric acid, the etchant is tetramethylammonium hydroxide, and the stabilizer is ethylenediaminetetraacetic acid.

7. The method of claim 6 , wherein the oxidant has a concentration within a solvent of between about 3% and about 20%, the etchant has a concentration within the solvent of between about 0.5% and about 15%, and the stabilizer has a concentration within the solvent of between about 0.1% and about 5%.

8. A method of manufacturing a semiconductor device, the method comprising:

forming a glue layer and a fill metal between a first spacer and a second spacer over a semiconductor fin;

applying a wet etching solution to the glue layer and the fill metal, the glue layer having a larger etching rate for the wet etching solution than the fill metal, the wet etching solution comprising:

an amine etchant;

an oxidant; and

a oxidant stabilizer; and

removing the wet etching solution, wherein after the removing the wet etching solution the fill metal extends above a top surface of the first spacer.

9. The method of claim 8 , wherein the forming the glue layer and the fill metal forms the glue layer and the fill metal in a first region between the first spacer and the second spacer and also in a second region between the first spacer and the second spacer, the first region also being between a third spacer and a fourth spacer.

10. The method of claim 9 , wherein after the removing the wet etching solution the glue layer is located within the first region but not the second region.

11. The method of claim 10 , wherein after the removing the wet etching solution the fill metal extends from within the first region to within the second region.

12. The method of claim 8 , wherein the fill metal comprises tungsten and the glue layer comprises titanium nitride.

13. The method of claim 8 , wherein the amine comprises ammonium hydroxide.

14. The method of claim 13 , wherein the oxidant comprises perchloric acid.

15. The method of claim 14 , wherein the oxidant stabilizer is 1,2-cyclohexanedinitrilotetraacetic acid.

16. A semiconductor device comprising:

a semiconductor fin;

first spacers over the semiconductor fin;

second spacers over the semiconductor fin, the second spacers extending further from the semiconductor fin than the first spacers, respective outer sidewalls of the first spacers being covered by respective inner sidewalls of the second spacers, wherein a first region is between the first spacers and a second region is between the second spacers over the first region;

a gate dielectric within the first region;

a glue layer over the gate dielectric within the first region but not extending into the second region; and

a fill metal located within both the first region and the second region, the fill metal extending further than the first spacers from the semiconductor fin and extending less than the second spacers from the semiconductor fin.

17. The semiconductor device of claim 16 , wherein the fill metal has a width of between about 2 nm and about 10 nm.

18. The semiconductor device of claim 17 , wherein the fill metal has a height of between about 5 nm and about 25 nm.

19. The semiconductor device of claim 16 , wherein the fill metal is tungsten and the glue layer is titanium nitride.

20. The semiconductor device of claim 16 , wherein the fill metal has a curved surface facing away from the semiconductor fin.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2020
From: LIAN, JIAN-JOU; LIN, CHUN-NENG; YEH, MING-HSI; CHEN, CHIEH-WEI; CHIANG, TZU-ANG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 051951/0167 →
Continuity (1)
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