IP Library › Granted Patent US 11,232,848
Granted Patent B2
US 11,232,848 · App. 15/540,491 · Granted Jan 25, 2022

Memory module error tracking

Inventor: Reza M. Bacchus (Houston, TX)
Assignee: Hewlett Packard Enterprise Development LP
G11C29/44G11C29/42G11C5/04G11C2029/0409G11C2029/4402
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Quick Facts
Patent No.
US 11,232,848
App. No.
15/540,491
Granted
Jan 25, 2022
Kind
B2
Abstract

In some examples, a memory module includes an error status indicator, an error address register, and error tracking circuitry. The error tracking circuitry may detect that memory data stored at a memory address for the memory module includes an error. In response, and without overwriting the memory data stored at the memory address, the error tracking circuitry may set the error status indicator and store the memory address in the error address register.

Claims (28)

1. A method for error tracking comprising:

through a memory module:

receiving a memory read request, from a host memory controller external to the memory module, for memory data stored at a particular memory address for the memory module;

retrieving the memory data from the particular memory address;

detecting that the memory data includes an error and in response, without overwriting the memory data stored at the particular memory address:

causing the particular memory address to be stored in an error address register of the memory module, wherein the memory module comprises a plurality of error address registers storing addresses of errant memory data;

setting an error status indicator to indicate that the error is detected;

in response to receiving an error inquiry from the external host memory controller and the error status indicator being set, sending contents of the error address registers to the external host memory controller to allow the external host memory controller to correct the errant memory data stored on the memory module by performing a read and write-back operation based on the contents of the error address registers;

correcting, by the memory module, the errant memory data to obtain corrected memory data; and

sending, by the memory module, the corrected memory data to the external host memory controller to allow the external host memory controller to correct the errant memory data using the corrected memory data sent by the memory module.

2. The method of claim 1 , further comprising periodically receiving the error inquiry from the external host memory controller.

3. The method of claim 1 , wherein causing the particular memory address to be stored comprises storing the particular memory address in the error address register when the particular memory address is not already stored in one of the plurality of error address registers.

4. The method of claim 1 , further comprising:

after sending the contents of the error address registers, removing the addresses of the errant memory data from the memory address registers; and

after removing the memory addresses from the error address registers, unsetting the error status indicator.

5. The method of claim 1 , further comprising:

maintaining, for the error address register, a counter; and

incrementing the counter when an error is detected for the particular memory address stored in the error address register.

6. A method for error tracking comprising:

through a host memory controller external to a memory module:

sending an error inquiry to the memory module, wherein the memory module comprises one or more error address registers storing addresses of errant memory data and an error indicator indicating error status of the memory module;

receiving, from the memory module in response to the error inquiry and the error status indicator being set, a response message comprising contents of the error address registers; and

correcting the errant memory data by performing a read and write-back operation based on the contents of the error address registers;

wherein correcting the errant memory data comprises:

receiving, by the host memory controller, corrected memory data from the memory module; and

correcting the errant memory data using the corrected memory data received from the memory module.

7. The method of claim 6 , further comprising periodically sending the error inquiry to the memory module at a periodicity set by an error inquiry parameter.

8. The method of claim 7 , further comprising adjusting the periodicity for the error inquiry to account for a characteristic of a host system implementing the host memory controller external to the memory module.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2017
From: BACCHUS, REZA M.
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 043248/0911 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2017
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 043513/0005 →
Continuity (1)
Related Publication 20170372799A1 · Dec 28, 2017