IP Library › Granted Patent US 11,232,953
Granted Patent B2
US 11,232,953 · App. 16/573,596 · Granted Jan 25, 2022

Method of manufacturing a semiconductor device and a semiconductor device

Inventors: Miao-Syuan Fan (Hsinchu, TW); Ching-Hua Lee (Hsinchu, TW); Ming-Te Chen (Hsinchu, TW); Jung-Wei Lee (Hsinchu, TW); Pei-Wei Lee (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L21/28518H01L21/02389H01L21/02532H01L21/02535H01L21/02694H01L29/665H01L29/6656
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Quick Facts
Patent No.
US 11,232,953
App. No.
16/573,596
Granted
Jan 25, 2022
Kind
B2
Abstract

A semiconductor device includes a gate structure disposed over a channel region, a source/drain epitaxial layer disposed at a source/drain region, a nitrogen containing layer disposed on the source/drain epitaxial layer, a silicide layer disposed on the nitrogen containing layer, and a conductive contact disposed on the silicide layer.

Claims (40)

1. A method of manufacturing a semiconductor device, the method comprising:

forming a source/drain epitaxial layer at a source/drain region disposed over a substrate;

forming a nitrogen containing layer on or in a surface of the source/drain epitaxial layer by exposing the surface of the source/drain epitaxial layer to plasma formed from a nitrogen containing gas that is a mixed gas of N 2 and Ar or to an NH 3 gas while heating the substrate at a temperature between 475° C. to 550° C.;

forming a metal layer over the nitrogen containing layer; and

forming an alloy layer of an element of the source/drain epitaxial layer over the source/drain region and an element of the metal layer,

wherein after the nitrogen containing layer is formed, an annealing operation at a temperature 475° C. or higher is performed.

2. The method of claim 1 , wherein the nitrogen containing layer is formed by exposing the surface of the source/drain epitaxial layer to the NH 3 gas.

3. The method of claim 1 , wherein the metal layer is a Ni layer, a W layer or a Ta layer.

4. The method of claim 1 , wherein the metal layer is a Ti layer.

5. The method of claim 1 , wherein the nitrogen containing layer contains nitrogen in an amount of at least 20 atomic %.

6. The method of claim 5 , wherein a thickness of the nitrogen containing layer containing nitrogen in an amount of at least 20 atomic % is in a range from 5 nm to 10 nm.

7. The method of claim 1 , wherein a peak nitrogen amount in the nitrogen containing layer is in a range from 50 atomic % to 95 atomic %.

8. The method of claim 1 , wherein the metal layer is a W layer.

9. The method of claim 1 , wherein the nitrogen containing layer is formed by exposing the surface of the source/drain epitaxial layer to the NH 3 .

10. A method of manufacturing a semiconductor device, the method comprising:

forming a source/drain epitaxial layer at a source/drain region disposed over a substrate;

performing a first implantation operation to introduce first ions into the source/drain epitaxial layer;

performing a second implantation operation to introduce second ions different from the first ions into the source/drain epitaxial layer;

performing a first annealing operation;

forming a nitrogen containing layer on or in a surface of the source/drain epitaxial layer by exposing the surface of the source/drain epitaxial layer to plasma formed from a nitrogen containing gas that is mixed gas of N 2 and Ar, or to an NH 3 gas while heating the substrate at a temperature between 475° C. to 550° C.;

forming a metallic layer over the nitrogen containing layer; and

forming an alloy layer of an element of the source/drain epitaxial layer over the source/drain region and an element of the metallic layer,

wherein after the nitrogen containing layer is formed, an annealing operation at a temperature 475° C. or higher is performed.

11. The method of claim 10 , wherein the source/drain epitaxial layer includes SiGe.

12. The method of claim 11 , wherein the first ions are Ge ions.

13. The method of claim 11 , wherein the second ions include boron.

14. The method of claim 10 , wherein the first annealing operation includes laser annealing.

15. The method of claim 10 , wherein the metallic layer is a Ni layer or a W layer.

16. The method of claim 10 , wherein the nitrogen containing layer is formed by exposing the surface of the source/drain epitaxial layer to the NH 3 .

17. A method of manufacturing a semiconductor device, the method comprising:

forming a source/drain epitaxial layer at a source/drain region disposed over a substrate;

forming an interlayer dielectric (ILD) layer over the source/drain epitaxial layer;

forming a contact opening in the ILD layer to expose a part of an upper surface the source/drain epitaxial layer;

forming a nitrogen containing layer on or in the upper surface of the source/drain epitaxial layer by exposing the surface of the source/drain epitaxial layer to plasma formed from mixed gas of N 2 and Ar or to an NH 3 gas while heating the substrate at a temperature between 475° C. to 550° C.;

forming a metallic layer over the nitrogen containing layer;

forming an alloy layer of an element of the source/drain epitaxial layer over the source/drain region and an element of the metallic layer; and

forming a conducive layer over the alloy layer in the contact opening,

wherein after the nitrogen containing layer is formed, an annealing operation at a temperature 475° C. or higher is performed.

18. The method of claim 17 , wherein the nitrogen containing layer is formed by exposing the surface of the source/drain epitaxial layer to the NH 3 gas.

19. The method of claim 17 , wherein the metal layer is a Ni layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 4, 2019
From: FAN, MIAO-SYUAN; LEE, CHING-HUA; CHEN, MING-TE; LEE, JUNG-WEI; LEE, PEI-WEI
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 050899/0839 →
Continuity (1)
Related Publication 20210082707A1 · Mar 18, 2021