IP Library › Granted Patent US 11,239,353
Granted Patent B2
US 11,239,353 · App. 16/670,412 · Granted Feb 1, 2022

Semiconductor device and method of manufacturing the same

Inventors: Sun Jin Yun (Daejeon, KR); Kwang Hoon Jung (Changwon-si, KR); So Hyun Kim (Daejeon, KR); Jung Wook Lim (Daejeon, KR)
Assignee: Electronics and Telecommunications Research Institute
H01L29/7606H01L21/02568H01L21/02614H01L29/045H01L29/0657
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Quick Facts
Patent No.
US 11,239,353
App. No.
16/670,412
Granted
Feb 1, 2022
Kind
B2
Abstract

Provided is a method of manufacturing a semiconductor device. The method includes providing a substrate, forming uneven portions in a region of the substrate in which an electrode is to be formed, forming a precursor film formed of a two-dimensional material on the substrate on which the uneven portions are formed, forming a metal chalcogen film by performing a chalcogenation process on the formed precursor film, and forming the electrode on the formed metal chalcogen film.

Claims (23)

1. A method of manufacturing a semiconductor device, the method comprising:

providing a substrate;

forming uneven portions in a region of the substrate in which an electrode is to be formed;

forming a precursor film of a two-dimensional material on the substrate including the uneven portions;

forming a metal chalcogen film by performing a chalcogenation process on the formed precursor film; and

forming the electrode on a part of the formed metal chalcogen film,

wherein the forming of the two-dimensional material on the substrate on which the uneven portions are formed includes forming the two-dimensional material film in regions including one or more contact regions and a channel region, and

wherein the forming of the metal chalcogenide film by performing the chalcogenation process of the formed precursor film includes:

forming a two-dimensional material layer including crystalline planes oriented in a direction parallel to the substrate in the channel region; and

forming two-dimensional material layers including crystalline planes oriented in a direction perpendicular to the substrate in valley portions of the contact regions.

2. The method of claim 1 , wherein the electrode is formed on the substrate.

3. The method of claim 1 , wherein the forming of the uneven portions in the region of the substrate in which the electrode is to be formed includes forming the uneven portions in a predetermined region of a surface of a dielectric film.

4. The method of claim 1 , wherein the forming of the two-dimensional material on the substrate including the uneven portions includes forming an ultra-thin metal film or an ultra-thin film of a partially oxidized metal, which is a precursor to become a two-dimensional material.

5. The method of claim 1 , the resistivity of precursor films may be in the range of 1×10 −5 Ω· cm-10 Ω·cm.

6. The method of claim 1 , wherein one or more two-dimensional materials are stacked in the contact regions.

7. The method of claim 1 , wherein:

the contact regions include one or more two-dimensional materials among MoS 2 , MoSe 2 , MoTe 2 , WSe 2 , WS 2 , WTe 2 , ZrS 2 , ZrSe 2 , ZrTe 2 , HfSe 2 , HfS 2 , HfTe 2 , SnS 2 , SnSe 2 , SnTe 2 , InSe 2 , InS 2 , InTe 2 , TiS 2 , TiSe 2 , TiTe 2 , NbS 2 , NbSe 2 , NbTe 2 , TaS 2 , TaSe 2 , TaTe 2 , ReS 2 , ReSe 2 , ReTe 2 , VS 2 , VSe 2 , and VTe 2 ; and

the channel region includes one or more two-dimensional materials among MoS 2 , MoSe 2 , MoTe 2 , WSe 2 , WS 2 , WTe 2 , ZrS 2 , ZrSe 2 , ZrTe 2 , HfSe 2 , HfS 2 , HfTe 2 , SnS 2 , SnSe 2 , SnTe 2 , InSe 2 , InS 2 , InTe 2 , TiS 2 , TiSe 2 , TiTe 2 , NbS 2 , NbSe 2 , NbTe 2 , TaS 2 , TaSe 2 , TaTe 2 , ReS 2 , ReSe 2 , ReTe 2 , VS 2 , VSe 2 , and VTe 2 .

8. The method of claim 7 , wherein one or more two-dimensional materials are stacked in the channel region.

9. The method of claim 1 , wherein the forming of the uneven portions in the region of the substrate on which the electrode is to be formed includes forming a lower electrode having the uneven portions formed in advance.

10. The method of claim 9 , further comprising forming semiconductor layers including one or more layers on the lower electrode.

11. The method of claim 1 , wherein a thickness of the metal chalcogenide film ranges from 0.6 nm to 20 nm.

12. The method of claim 1 , wherein valley portions of the uneven portions have an angle of 120 degrees or less.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2019
From: YUN, SUN JIN; JUNG, KWANG HOON; KIM, SO HYUN; LIM, JUNG WOOK
To: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Reel/Frame 050882/0781 →
Priority Claims (2)
KR 10-2018-0132739 · Nov 1, 2018 · national
KR 10-2019-0132561 · Oct 23, 2019 · national
Continuity (1)
Related Publication 20200144405A1 · May 7, 2020