IP Library › Granted Patent US 11,244,722
Granted Patent B2
US 11,244,722 · App. 17/025,523 · Granted Feb 8, 2022

Programmable interposers for electrically connecting integrated circuits

Inventor: Michael Kozicki (Phoenix, AZ)
Assignee: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
G11C13/0011H01L23/40H01L23/528H01L27/24H01L45/085
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Quick Facts
Patent No.
US 11,244,722
App. No.
17/025,523
Granted
Feb 8, 2022
Kind
B2
Abstract

Programmable interposers for connecting integrated circuits, methods for programming programmable interposers, and integrated circuit packaging are provided. The programmable interposers are electrically reconfigurable to allow custom system-in-package (SiP) operation and configuration, field configurability, and functional obfuscation for secure integrated circuits fabricated in non-trusted environments. The programmable interposer includes, in one implementation, an interposer substrate and a programmable metallization cell (PMC) switch. The PMC switch is formed on the interposer substrate and is coupled between a signal input and a signal output. The PMC switch is electrically configurable between a high resistance state and a low resistance state.

Claims (40)

1. A programmable interposer for electrically connecting integrated circuits, the programmable interposer comprising:

an interposer substrate; and

a programmable metallization cell (PMC) switch formed on the interposer substrate and coupled between a first signal input and a first signal output, wherein the PMC switch is electrically configurable between a high resistance state and a low resistance state,

wherein the PMC switch is a four-terminal PMC switch coupled between the first signal input, the first signal output, and a second signal output and electrically configurable to set one or both of the first signal output and the second signal output in the low resistance state.

2. The programmable interposer of claim 1 , further comprising a configuration controller coupled to the PMC switch and configured to set the PMC switch in the low resistance state or the high resistance state.

3. The programmable interposer of claim 2 , wherein the PMC switch is a first PMC switch, wherein the programmable interposer further comprising a second PMC switch, wherein the configuration controller is further configured to set the second PMC switch in the low resistance state or the high resistance state.

4. The programmable interposer of claim 1 , wherein the PMC switch includes a PMC element having:

an insulating material,

an ion conductor formed at least partially within the insulating material,

an oxidizable electrode positioned proximate to the ion conductor, and

an indifferent electrode positioned proximate to the ion conductor.

5. The programmable interposer of claim 4 , wherein the ion conductor comprises silicon oxide and copper.

6. The programmable interposer of claim 4 , wherein the insulating material comprises the interposer substrate.

7. The programmable interposer of claim 4 , wherein the PMC element is a first PMC element, wherein the PMC switch further includes a second PMC element sharing the indifferent electrode of the first PMC element.

8. The programmable interposer of claim 7 , further comprising a configuration controller coupled to the PMC switch and configured to set the PMC switch in the low resistance state by applying a switching threshold voltage to the indifferent electrode.

9. The programmable interposer of claim 1 , wherein the PMC switch includes a plurality of PMC elements connected in a parallel configuration between the first signal input and the first signal output.

10. A method for programming a programmable interposer for electrically connecting integrated circuits, the programmable interposer comprising an interposer substrate and a programmable metallization cell (PMC) switch formed on the interposer substrate and coupled between a first signal input and a first signal output, wherein the PMC switch is a four-terminal PMC switch coupled between the first signal input, the first signal output, and a second signal output, the method comprising:

electrically configuring one or both of the first signal output and the second signal output of the PMC switch in a low resistance state; and

electrically configuring the PMC switch in a high resistance state.

11. The method of claim 10 , wherein electrically configuring the PMC switch in the low resistance state includes applying a switching threshold voltage to the PMC switch.

12. The method of claim 10 , wherein electrically configuring the PMC switch in the high resistance state includes applying a reverse bias voltage to the PMC switch.

13. An integrated circuit packaging comprising:

a programmable interposer including:

an interposer substrate, and

a programmable metallization cell (PMC) switch formed on the interposer substrate and coupled between a first signal input and a first signal output, wherein the PMC switch is electrically configurable between a high resistance state and a low resistance state,

wherein the PMC switch is a four-terminal PMC switch coupled between the first signal input, the first signal output, and a second signal output and electrically configurable to set one or both of the first signal output and the second signal output in the low resistance state.

14. The integrated circuit packaging of claim 13 , further comprising an integrated circuit component including the first signal input and the first signal output.

15. The integrated circuit packaging of claim 13 , further comprising:

a first integrated circuit component including the first signal input; and

a second integrated circuit component including the first signal output.

16. The integrated circuit packaging of claim 13 , wherein the programmable interposer further including a configuration controller coupled to the PMC switch and configured to set the PMC switch in the low resistance state or the high resistance state.

17. The integrated circuit packaging of claim 16 , wherein the configuration controller is further configured to:

set the PMC switch in the low resistance state by applying a switching threshold voltage to the PMC switch, and

set the PMC switch in the high resistance state by applying a reverse bias voltage to the PMC switch.

18. The integrated circuit packaging of claim 13 , wherein the PMC switch includes a PMC element having:

an insulating material,

an ion conductor formed at least partially within the insulating material,

an oxidizable electrode positioned proximate to the ion conductor, and

an indifferent electrode positioned proximate to the ion conductor.

19. The integrated circuit packaging of claim 13 , wherein the PMC switch includes a plurality of PMC elements connected in a parallel configuration between the first signal input and the first signal output.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2020
From: KOZICKI, MICHAEL
To: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
Reel/Frame 053819/0923 →
Continuity (2)
Provisional Application 62903399 · Sep 20, 2019
Related Publication 20210090649A1 · Mar 25, 2021
Cited By (2)
US 12,527,236 US 12,626,759