Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line
Embodiments of the present invention are directed to fabrication method and resulting structures for forming interconnects using a conductive spacer configured to prevent a short between a via and an adjacent line. In a non-limiting embodiment of the invention, a first conductive line and a second conductive line are formed in a metallization layer. A conductive spacer is formed on the first conductive line and a conductive via is formed on a surface of the conductive spacer. The conductive via is positioned such that the conductive spacer is between the first conductive line and the conductive via. A height of the conductive spacer is selected to provide a predetermined distance from the conductive via to the second conductive line. The predetermined distance from the conductive via to the second conductive line is sufficient to prevent a short between the conductive via and the second conductive line.
1. A method for forming a metallization region of an integrated circuit, the method comprising:
forming a first conductive line and a second conductive line in a first metallization layer of an interconnect structure, the first conductive line positioned adjacent to the second conductive line in the first metallization layer;
forming a conductive spacer on the first conductive line, wherein forming the conductive spacer comprises:
forming a trench in a hard mask, the trench exposing a surface of the first conductive line;
depositing the conductive spacer into the trench; and
removing the hard mask after depositing the conductive spacer;
forming a conductive via on a surface of the conductive spacer, the conductive via positioned such that the conductive spacer is between the first conductive line and the conductive via, wherein a portion of the conductive via comprises a chamfered region that overlaps a portion of the second conductive line; and
forming a third conductive line in a second metallization layer of the interconnect structure, the third conductive line formed directly on the conductive via such that the conductive via electrically couples the first metallization layer to the second metallization layer;
wherein a height of the conductive spacer is selected to provide a predetermined distance from the conductive via to the second conductive line; and
wherein the predetermined distance from the conductive via to the second conductive line is defined as the distance required to prevent contact between the conductive via and the second conductive line at any degree of chamfering of the conductive via.
2. The method of claim 1 , wherein forming the conductive via comprises:
forming an interlayer dielectric over the first conductive line and the conductive spacer;
forming a trench in the interlayer dielectric, the trench exposing a surface of the conductive spacer; and
forming the conductive via on a surface of the conductive spacer in the trench.
3. The method of claim 1 , wherein the first conductive line comprises a metal line.
4. The method of claim 3 , wherein the first conductive line comprises copper.
5. The method of claim 4 , wherein the conductive spacer comprises ruthenium.
6. The method of claim 5 , wherein the conductive spacer is selectively deposited on the surface of the first conductive line.
7. The method of claim 1 , wherein the conductive spacer comprises a height of about 10 nm.