IP Library Granted Patent US 11,244,880
Granted Patent B2
US 11,244,880 · App. 16/839,635 · Granted Feb 8, 2022

Semiconductor device

Inventors: Takanori Kawashima (Anjo, JP); Takuya Kadoguchi (Toyota, JP); Kohji Uramoto (Toyota, JP); Yasuhiro Ogawa (Toyota, JP)
Assignee: DENSO CORPORATION
H01L23/3142H01L21/4825H01L23/3114H01L23/49805H01L23/49861
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Quick Facts
Patent No.
US 11,244,880
App. No.
16/839,635
Granted
Feb 8, 2022
Kind
B2
Abstract

A semiconductor device may be provided with: a semiconductor chip; an encapsulant encapsulating the semiconductor chip therein; and a conductor member joined to the semiconductor chip via a solder layer within the encapsulant. The conductor member may comprise a joint surface in contact with the solder layer and a side surface extending from a peripheral edge of the joint surface. The side surface may comprise an unroughened area and a roughened area that is greater in surface roughness than the unroughened area. The unroughened area may be located adjacent to the peripheral edge of the joint surface.

Claims (22)

1. A semiconductor device comprising:

a semiconductor chip;

an encapsulant encapsulating the semiconductor chip therein; and

a conductor member joined to the semiconductor chip via a solder layer within the encapsulant;

wherein

the conductor member comprises a joint surface being in contact with the solder layer and a side surface extending from a peripheral edge of the joint surface,

the side surface comprises a plurality of flat surfaces located along the peripheral edge of the joint surface and a plurality of corners each located between a corresponding pair of adjacent flat surfaces of the plurality of flat surfaces,

at least two of the plurality of flat surfaces each comprises an unroughened area and a roughened area that is greater in surface roughness than the unroughened area,

the unroughened area is located adjacent to the peripheral edge of the joint surface, and

all parts of the roughened area are located apart from each of the corners.

2. The semiconductor device according to claim 1 , wherein the roughened area is located apart from the peripheral edge of the joint surface.

3. The semiconductor device according to claim 1 , wherein

the conductor member comprises a plate-shaped portion and a protruding portion protruding from a surface of the plate-shaped portion, and

the joint surface and the side surface are located on the protruding portion.

4. The semiconductor device according to claim 3 , wherein

the surface of the plate-shaped portion comprises a groove extending around the protruding portion, and

the unroughened area extends from the peripheral edge of the joint surface to the groove.

5. The semiconductor device according to claim 1 , wherein the side surface slopes outwardly in a direction separating away from the joint surface.

6. The semiconductor device according to claim 1 , wherein all of the plurality of flat surfaces each comprises the roughened area.

7. The semiconductor device according to claim 1 , wherein

the roughened area includes two or more roughened areas, and

at least one of the plurality of flat surfaces comprises at least two of the two or more roughened areas.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA
To: DENSO CORPORATION
Reel/Frame 053892/0724 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2020
From: KAWASHIMA, TAKANORI; KADOGUCHI, TAKUYA; URAMOTO, KOHJI; OGAWA, YASUHIRO
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 052307/0413 →
Priority Claims (1)
JP JP2019-092411 · May 15, 2019 · national
Continuity (1)
Related Publication 20200365498A1 · Nov 19, 2020