Integrated dipole flow for transistor
Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-κ dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium lanthanum nitride (TiLaN), titanium yttrium nitride (TiYN), titanium strontium nitride (TiSrN), titanium magnesium nitride (TiMgN, titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), hafnium carbide (HfC), hafnium nitride (HfN), hafnium oxynitride (HfON), hafnium oxycarbide (HfOC), hafnium carbide aluminum (HfCAl), hafnium aluminum nitride (HfAlN), or hafnium carbonitride (HfCN).
1. A method of manufacturing an electronic device, the method comprising:
depositing an interlayer dielectric on a top surface of a channel located between a source and a drain on a substrate;
depositing a high-κ dielectric material on the interlayer dielectric; and
depositing a dipole layer on the high-κ dielectric material,
wherein the dipole layer comprises one or more of titanium lanthanum nitride (TiLaN), titanium yttrium nitride (TiYN), titanium strontium nitride (TiSrN), titanium magnesium nitride (TiMgN), titanium aluminum nitride (TiAlN), or titanium tantalum nitride (TiTaN), and
wherein depositing the dipole layer comprises atomic layer deposition, at a temperature in a range of about 200° C. to about 500° C., of alternating cycles of titanium nitride (TiN) and a dipole precursor.
2. The method of claim 1 , wherein the dipole precursor comprises one or more of lanthanum nitride (LaN), yttrium nitride (YN), strontium nitride (SrN), magnesium nitride (MgN), aluminum nitride (AlN), or tantalum nitride (TaN).
3. The method of claim 1 , wherein the dipole region has a thickness of less than about 50 Å.
4. A method of manufacturing an electronic device, the method comprising:
depositing an interlayer dielectric on a top surface of a channel located between a source and a drain on a substrate;
depositing a high-κ dielectric material on the interlayer dielectric; and
depositing a dipole layer on the high-κ dielectric material,
wherein the dipole layer comprises one or more of hafnium carbide (HfC), hafnium nitride (HfN), hafnium oxynitride (HfON), hafnium oxycarbide (HfOC), hafnium carbide aluminum (HfCAl), hafnium aluminum nitride (HfAlN), or hafnium carbonitride (HfCN), and
wherein depositing the dipole layer comprises atomic layer deposition, at a temperature in a range of about 200° C. to about 500° C. of alternating cycles of a hafnium precursor and a second precursor.
5. The method of claim 4 , wherein the hafnium precursor comprises hafnium tetrachloride and the second precursor comprises one or more of triethylaluminum, trimethylaluminum, trisneopentylaluminum, tetrabutylaluminum, or ammonia.
6. The method of claim 5 , further comprising in situ deposition of a capping layer, the capping layer comprising one or more of titanium nitride or titanium aluminum.
7. The method of claim 4 , wherein the dipole region has a thickness of less than about 50 Å.