IP Library › Granted Patent US 11,245,037
Granted Patent B2
US 11,245,037 · App. 16/616,965 · Granted Feb 8, 2022

Method of fabricating array substrate, array substrate, and display apparatus

Inventors: Shengguang Ban (Beijing, CN); Zhanfeng Cao (Beijing, CN); Qi Yao (Beijing, CN)
Assignee: BOE Technology Group Co., Ltd.
H01L29/78633H01L29/66757H01L29/78675H01L21/0245H01L21/02178H01L21/02244H01L21/02488H01L21/02502H01L21/02513H01L21/02532H01L21/02592H01L21/02675H01L27/1214
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Quick Facts
Patent No.
US 11,245,037
App. No.
16/616,965
Granted
Feb 8, 2022
Kind
B2
Abstract

The present application provides an array substrate. The array substrate includes a base substrate; a light shielding layer on the base substrate; a metal oxide layer on a side of the light shielding layer distal to the base substrate; and an active layer on a side of the metal oxide layer distal to the base substrate. The metal oxide layer includes a metal oxide material. The light shielding layer includes amorphous silicon. An orthographic projection of the light shielding layer on the base substrate substantially overlaps with an orthographic projection of the active layer on the base substrate, and substantially overlaps with an orthographic projection of the metal oxide layer on the base substrate.

Claims (51)

1. An array substrate, comprising:

a base substrate;

a light shielding layer on the base substrate;

a metal oxide layer on a side of the light shielding layer away from the base substrate;

a second buffer layer on a side of the metal oxide layer away from the light shielding layer; and

an active layer on a side of the metal oxide layer away from the base substrate;

wherein the metal oxide layer comprises a metal oxide material;

the light shielding layer comprises amorphous silicon;

the second buffer layer and the metal oxide layer are two discrete layers and comprise different materials, respectively;

an orthographic projection of the light shielding layer on the base substrate covers an orthographic projection of the metal oxide layer on the base substrate;

the orthographic projection of the metal oxide layer on the base substrate covers an orthographic projection of the second buffer layer on the base substrate; and

the orthographic projection of the second buffer layer on the base substrate covers an orthographic projection of the active layer on the base substrate.

2. The array substrate of claim 1 , wherein the light shielding layer has a thickness in a range of approximately 700 Å to approximately 1200 Å.

3. The array substrate of claim 1 , wherein the metal oxide layer has a thickness in a range of approximately 100 Å to approximately 1000 Å.

4. The array substrate of claim 1 , further comprising a first buffer layer between the light shielding layer and the base substrate.

5. The array substrate of claim 4 , wherein the first buffer layer comprises one or a combination of silicon oxide and silicon nitride.

6. The array substrate of claim 1 , wherein the array substrate comprises a stacked structure comprising the light shield layer, the metal oxide layer, the second buffer layer, and the active layer stacked together;

the metal oxide layer is in direct contact with the light shield layer, the second buffer layer is in direct contact with the metal oxide layer, and the active layer is in direct contact with the second buffer layer; and

a cross-section of the stacked structure has a trapezoidal shape in which widths of the active layer, the second buffer layer, the metal oxide layer, and the light shield layer gradually increase.

7. The array substrate of claim 1 , wherein the second buffer layer has a thickness in a range of approximately 1000 Å to approximately 3000 Å.

8. The array substrate of claim 1 , wherein the second buffer layer comprises silicon oxide.

9. The array substrate of claim 1 , wherein the metal oxide layer comprises aluminum oxide.

10. The array substrate of claim 1 , wherein the active layer comprises polycrystalline silicon.

11. A display apparatus, comprising the array substrate of claim 1 .

12. A method of fabricating an array substrate, comprising:

forming a first amorphous silicon layer on a base substrate;

forming a metal oxide material layer on a side of the first amorphous silicon layer distal to the base substrate; and

forming a polycrystalline silicon layer on a side of the metal oxide material layer distal to the first amorphous silicon layer

wherein the method comprises forming a stacked structure comprising:

a light shielding layer on the base substrate;

a metal oxide layer on a side of the light shielding layer away from the base substrate;

a second buffer layer on a side of the metal oxide layer away from the light shielding layer; and

an active layer on a side of the metal oxide layer away from the base substrate;

the second buffer layer and the metal oxide layer are two discrete layers and comprise different materials, respectively;

an orthographic projection of the light shielding layer on the base substrate covers an orthographic projection of the metal oxide layer on the base substrate;

the orthographic projection of the metal oxide layer on the base substrate covers an orthographic projection of the second buffer layer on the base substrate; and

the orthographic projection of the second buffer layer on the base substrate covers an orthographic projection of the active layer on the base substrate.

13. The method of claim 12 , further comprising patterning the first amorphous silicon layer, the metal oxide material layer, and the polycrystalline silicon layer in a single patterning process, thereby forming a light shielding layer on the base substrate, and an active layer on a side of the light shielding layer distal to the base substrate.

14. The method of claim 12 , wherein forming the metal oxide material layer comprises:

forming a metallic material layer on a side of the first amorphous silicon layer distal to the base substrate; and

oxidizing the metallic material layer to form the metal oxide material layer.

15. The method of claim 14 , wherein the metallic material layer is made of aluminum, and the metal oxide material layer comprises aluminum oxide.

16. The method of claim 14 , wherein oxidizing the metallic material layer comprises annealing the metallic material layer in an oxygen-containing atmosphere.

17. The method of claim 12 , prior to forming the first amorphous silicon layer, further comprising forming a first buffer layer on a side first amorphous silicon layer distal to the base substrate.

18. The method of claim 12 , wherein forming the polycrystalline silicon layer comprises:

forming a second amorphous silicon layer on a side of the metal oxide material layer distal to the first amorphous silicon layer; and

crystallizing the second amorphous silicon layer to form the polycrystalline silicon layer.

19. The method of claim 18 , wherein crystallizing the second amorphous silicon layer is performed by excimer laser annealing.

20. The method of claim 18 ,

wherein the metal oxide layer is in direct contact with the light shield layer, the second buffer layer is in direct contact with the metal oxide layer, and the active layer is in direct contact with the second buffer layer; and

a cross-section of the stacked structure has a trapezoidal shape in which widths of the active layer, the second buffer layer, the metal oxide layer, and the light shield layer gradually increase.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2019
From: BAN, SHENGGUANG
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 051282/0800 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2019
From: CAO, ZHANFENG
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 051282/0806 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2019
From: YAO, QI
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 051282/0809 →
Priority Claims (1)
CN 201710772525.0 · Aug 31, 2017 · national
Continuity (1)
Related Publication 20200168745A1 · May 28, 2020