Health monitoring and failure prognosis of power electronics devices

1. A system for monitoring a power electronics device, the system comprising:

a semiconductor device having a case;

at least one sensor; and

a processor,

wherein the processor is configured to monitor a junction temperature of the semiconductor device by:

determining from the at least one sensor an on-state resistance of the semiconductor device, and

calculating the junction temperature of the semiconductor device according to a relationship between the on-state resistance of the semiconductor device, based on aged samples lookup table data, and a case temperature of the semiconductor device.

2. A system according to claim 1 , wherein the relationship comprises a mathematical relationship, lookup table, or graph correlating aged on-state resistance values with case temperature values and junction temperature values.

3. A system according to claim 1 , wherein the relationship comprises a mathematical curve definition or a non-linear regression model.

4. A system according to claim 1 , wherein the power electronics device is a power converter.

5. A system according to claim 1 , wherein the semiconductor device is an insulated-gate bipolar transistor.

6. A system according to claim 1 , wherein the processor outputs at least one of a control and an alert signal for the semiconductor device based upon the calculated junction temperature being greater than a threshold value.

7. A system according to claim 6 , wherein, in response to the calculated junction temperature being greater than the threshold value, the processor outputs a signal to at least one of:

shut down the power electronics device,

limit further operation of the power electronics device, and

at least one of schedule maintenance, repair, and replacement of the power electronics device.

8. A system according to claim 1 , wherein the at least one sensor comprises at least one of a current sensor and a voltage sensor.

9. A system according to claim 8 , wherein at least one of a phase current and a phase voltage is sensed by the sensor.

10. A system according to claim 9 , wherein the processor extracts from at least one of the sensed phase current and the sensed phase voltage at least one of a semiconductor device current and a semiconductor device voltage.

11. A system according to claim 1 , wherein the processor determines the on-state resistance based on an output of the at least one sensor and an age of the semiconductor device by calculating a modified on-state resistance of the semiconductor device dependent on the age of the semiconductor device.

12. A system according to claim 11 , wherein the processor applies an ageing coefficient (α) to the on-state resistance.

13. A system according to claim 12 , wherein the processor determines at least one of a change in the junction temperature and a number of junction temperature calculations, and

the ageing coefficient is updated in response to at least one of the change in the junction temperature being more than a first predetermined threshold and the number of junction temperature calculations effected being more than a second predetermined threshold.

14. A method of determining a junction temperature in a semiconductor device, the method comprising:

determining an on-state resistance of the semiconductor device;

calculating the junction temperature of the semiconductor device; and

defining a first relationship between the on-state resistance of the semiconductor device and the junction temperature of the semiconductor device,

wherein the junction temperature of the semiconductor device is calculated according to a second relationship between the on-state resistance of the semiconductor device, based on aged samples lookup table data, and a case temperature of the semiconductor device.

15. A method according to claim 14 , further comprising outputting at least one of a control signal and an alert for the semiconductor device based upon the calculated junction temperature.

16. A method according to claim 14 , wherein the first relationship is attained by offline thermal characterisation of the semiconductor device.

17. A method according to claim 16 , further comprising applying the offline thermal characterisation of the semiconductor device to the determined on-state resistance of the semiconductor device.

18. A data carrier comprising machine readable instructions for operating at least one processor in a system for monitoring a power electronics device to monitor a junction temperature of a semiconductor device by:

receiving at least one sensor signal and determining from the at least one sensor signal an on-state resistance value of the semiconductor device;

calculating the junction temperature of the semiconductor device; and

accessing a stored first relationship between the on-state resistance of the semiconductor device and the junction temperature of the semiconductor device, and

wherein the junction temperature of the semiconductor device is calculated according to a second relationship between the on-state resistance of the semiconductor device, based on the stored first relationship, and a case temperature of the semiconductor device.