Multi-layer ceramic capacitor and method of producing the same
A multi-layer ceramic capacitor includes a first region, a second region, a multi-layer unit, and a side margin. In the first region, crystal grains including intragranular pores are dispersed. In the second region, crystal grains including intragranular pores are not dispersed. The multi-layer unit includes ceramic layers that are laminated in a first direction and include the second region, and internal electrodes disposed between the ceramic layers. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction and includes a region, the region being adjacent to the multi-layer unit and including the first region.
1. A multi-layer ceramic capacitor, comprising:
a first region in which crystal grains including intragranular pores are dispersed;
a second region in which crystal grains including intragranular pores are not dispersed;
a multi-layer unit including
ceramic layers that are laminated in a first direction and include the second region, and
internal electrodes disposed between the ceramic layers; and
a side margin that covers the multi-layer unit from a second direction orthogonal to the first direction and includes a region, the region being adjacent to the multi-layer unit and including the first region,
wherein the side margin includes the first region over the entire side margin.
2. A multi-layer ceramic capacitor, comprising:
a first region in which crystal grains including intragranular pores are dispersed;
a second region in which crystal grains including intragranular pores are not dispersed;
a multi-layer unit including
ceramic layers that are laminated in a first direction and include the second region, and
internal electrodes disposed between the ceramic layers; and
a side margin that covers the multi-layer unit from a second direction orthogonal to the first direction and includes a region, the region being adjacent to the multi-layer unit and including the first region,
wherein the side margin includes
an external layer including the second region, and
a connection layer that is disposed between the external layer and the multi-layer unit and includes the first region over the entire side margin.
3. The multi-layer ceramic capacitor according to claim 1 , wherein
the first region includes silicon of 0.5 mol % or less.
4. The multi-layer ceramic capacitor according to claim 1 , wherein
the side margin has a grain boundary pore rate of 5% or less.
5. The multi-layer ceramic capacitor according to claim 1 , wherein
each of the first region and the second region includes polycrystal having a perovskite structure including barium and titanium.
6. The multi-layer ceramic capacitor according to claim 2 , wherein
the first region includes silicon of 0.5 mol % or less.
7. The multi-layer ceramic capacitor according to claim 2 , wherein
the side margin has a grain boundary pore rate of 5% or less.
8. The multi-layer ceramic capacitor according to claim 2 , wherein
each of the first region and the second region includes polycrystal having a perovskite structure including barium and titanium.