Array substrate, manufacturing method thereof and display device
View Patent ↗The present disclosure relates to the field of display technology, and provides an array substrate, a manufacturing method thereof and a display device. The array substrate includes a display region and a wiring region surrounding thereof. The array substrate further includes a base substrate, a first conductive layer, a first insulating layer, a second conductive layer, a second insulating layer and a patterned shielding layer disposed sequentially thereon. The shielding layer includes a shielding portion in the wiring region. The first and second conductive layers include respectively first and second signal lead wires in the wiring region. There is no overlap between orthographic projections of the first and second signal lead wires on the base substrate. A difference between vertical distances from the first signal lead wire and from the second signal lead wire to the shielding layer is smaller than a thickness of the first insulating layer.
1. An array substrate, comprising a display region and a wiring region around the display region, wherein the array substrate further comprises:
a base substrate; and
a first conductive layer, a first insulating layer, a second conductive layer, a second insulating layer and a patterned shielding layer sequentially stacked on the base substrate,
wherein the shielding layer comprises a shielding portion in the wiring region,
wherein the first conductive layer comprises a first signal lead wire in the wiring region,
wherein the second conductive layer comprises a second signal lead wire in the wiring region, and
wherein an orthographic projection of the first signal lead wire on the base substrate does not overlap an orthographic projection of the second signal lead wire on the base substrate,
wherein a difference between a vertical distance from the first signal lead wire to the shielding portion and a vertical distance from the second signal lead wire to the shielding portion is less than a thickness of the first insulating layer,
wherein an orthographic projection of the shielding portion on the base substrate overlaps the orthographic projections of the first signal lead wire and the second signal lead wire,
wherein the second insulating layer comprises a thinned region,
wherein an orthographic projection of the thinned region on the base substrate at least overlaps the orthographic projection of the first signal lead wire on the base substrate, but does not overlap the orthographic projection of the second signal lead wire on the base substrate,
wherein the second insulating layer has an opening formed in the thinned region,
wherein the array substrate further comprises an etch stop pattern in the thinned region of the second insulating layer, and
wherein the etch stop pattern comprises a non-conductive medium.
2. The array substrate according to claim 1 ,
wherein the vertical distance from the first signal lead wire to the shielding portion is equal to the vertical distance from the second signal lead wire to the shielding portion.
3. The array substrate according to claim 2 ,
wherein the second insulating layer comprises a thinned region,
wherein an orthographic projection of the thinned region on the base substrate at least overlaps the orthographic projection of the first signal lead wire on the base substrate, but does not overlap the orthographic projection of the second signal lead wire on the base substrate.
4. The array substrate according to claim 2 , further comprising:
a non-conductive medium pattern between the second conductive layer and the shielding layer,
wherein an orthographic projection of the non-conductive medium pattern on the base substrate at least overlaps the orthographic projection of the second signal lead wire on the base substrate, but does not overlap the orthographic projection of the first signal lead wire on the base substrate.
5. The array substrate according to claim 1 , wherein the etch stop pattern is in a same layer and of a same material as an active layer pattern in the display region of the array substrate.
6. The array substrate according to claim 1 , wherein the etch stop pattern comprises a conductive material and is formed integrally with the shielding layer.
7. The array substrate according to claim 6 , wherein the etch stop pattern is in a same layer and of a same material as a pixel electrode pattern in the display region of the array substrate.
8. The array substrate according to claim 1 , further comprising:
a non-conductive medium pattern between the second conductive layer and the shielding layer,
wherein an orthographic projection of the non-conductive medium pattern on the base substrate at least overlaps the orthographic projection of the second signal lead wire on the base substrate, but does not overlap the orthographic projection of the first signal lead wire on the base substrate.
9. The array substrate according to claim 8 , wherein the non-conductive medium pattern is between the second insulating layer and the shielding layer.
10. A display device, comprising the array substrate according to claim 1 .
11. An array substrate, comprising a display region and a wiring region around the display region, wherein the array substrate further comprises:
a base substrate; and
a first conductive layer, a first insulating layer, a second conductive layer, a second insulating layer and a patterned shielding layer sequentially stacked on the base substrate,
wherein the shielding layer comprises a shielding portion in the wiring region,
wherein the first conductive layer comprises a first signal lead wire in the wiring region,
wherein the second conductive layer comprises a second signal lead wire in the wiring region, and
wherein an orthographic projection of the first signal lead wire on the base substrate does not overlap an orthographic projection of the second signal lead wire on the base substrate,
wherein a difference between a vertical distance from the first signal lead wire to the shielding portion and a vertical distance from the second signal lead wire to the shielding portion is less than a thickness of the first insulating layer,
wherein an orthographic projection of the shielding portion on the base substrate overlaps the orthographic projections of the first signal lead wire and the second signal lead wire,
wherein the array substrate further comprises a non-conductive medium pattern between the second conductive layer and the shielding layer,
wherein an orthographic projection of the non-conductive medium pattern on the base substrate at least overlaps the orthographic projection of the second signal lead wire on the base substrate, but does not overlap the orthographic projection of the first signal lead wire on the base substrate, and
wherein the non-conductive medium pattern is between the second conductive layer and the second insulating layer.
12. A manufacturing method for an array substrate, comprising;
forming a first conductive layer, a first insulating layer and a second conductive layer sequentially on a base substrate, wherein the first conductive layer comprises a first signal lead wire, the second conductive layer comprises a second signal lead wire, and wherein there is no overlap between an orthographic projection of the first signal lead wire on the base substrate and an orthographic projection of the second signal lead wire on the base substrate;
forming an insulating film covering the second conductive layer on the base substrate, and thinning a portion to be thinned of the insulating film to obtain a second insulating layer with a thinned region, wherein an orthographic projection of the portion to be thinned on the base substrate at least overlaps the orthographic projection of the first signal lead wire on the base substrate, but does not overlap the orthographic projection of the second signal lead wire on the base substrate; and
forming a patterned shielding layer on the second insulating layer,
after forming the first insulating layer on the base substrate, and before forming the insulating film overlapping the second conductive layer, forming an etch stop pattern,
wherein an orthographic projection of the etch stop pattern on the second insulating layer overlaps with the thinned region,
wherein the shielding layer comprises a shielding portion,
wherein an orthographic projection of the shielding portion on the base substrate overlaps the orthographic projections of the first signal lead wire and the second signal lead wire,
wherein the array substrate comprises a display region and a wiring region around the display region, and
wherein the first signal lead wire, the second signal lead wire and the shielding portion are formed in the wiring region, and
wherein the forming the etch stop pattern comprises:
forming a semiconductor film on the base substrate; and
performing a patterning process on the semiconductor film to form an active layer pattern in the display region of the array substrate and the etch stop pattern.
13. The manufacturing method for an array substrate according to claim 12 , wherein the forming the etch stop pattern comprises:
forming a transparent conductive film on the base substrate; and
performing a patterning process on the transparent conductive film to form a pixel electrode pattern in the display region of the array substrate and the etch stop pattern.