High electron mobility transistor
A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, in which the buffer layer includes a first buffer layer and a second buffer layer. Preferably, the first buffer layer includes a first layer of the first buffer layer comprising Al y Ga 1-y N on the substrate and a second layer of the first buffer layer comprising Al x Ga 1-x N on the first layer of the first buffer layer. The second buffer layer includes a first layer of the second buffer layer comprising Al w Ga 1-w N on the first buffer layer and a second layer of the second buffer layer comprising Al z Ga 1-z N on the first layer of the second buffer layer, in which x>z>y>w.
1. A high electron mobility transistor (HEMT), comprising:
a nucleation layer on a substrate;
a buffer layer on the nucleation layer, wherein the buffer layer comprises:
a first buffer layer comprising:
a first layer of the first buffer layer on and directly contacting a top surface of the nucleation layer, wherein the first layer of the first buffer layer comprises Al y Ga 1-y N;
a second layer of the first buffer layer on and directly contacting a top surface of the first layer of the first buffer layer, wherein the second layer of the first buffer layer comprises Al x Ga 1-x N;
a second buffer layer comprising:
a first layer of the second buffer layer on the first buffer layer, wherein the first layer of the second buffer layer comprises Al w Ga 1-w N; and
a second layer of the second buffer layer on a top surface of the first layer of the second buffer layer, wherein the second layer of the second buffer layer comprises Al z Ga 1-z N and x>z>y>w;
a third buffer layer comprising:
a first layer of the third buffer layer on the second buffer layer, wherein the first layer of the third buffer layer comprises Al q Ga 1-q N; and
a second layer of the third buffer layer on the first layer of the third buffer layer, wherein the second layer of the third buffer layer comprises Al p Ga 1-p N and x>z>p>y>w>q.
2. The HEMT of claim 1 , wherein the first buffer layer comprises:
a third layer of the first buffer layer on the second layer of the first buffer layer, wherein the third layer of the first buffer layer comprises Al y Ga 1-y N; and
a fourth layer of the first buffer layer on the third layer of the first buffer layer, wherein the fourth layer of the first buffer layer comprises Al x Ga 1-x N.
3. The HEMT of claim 1 , wherein the second buffer layer comprises:
a third layer of the second buffer layer on the second layer of the second buffer layer, wherein the third layer of the second buffer layer comprises Al w Ga 1-w N; and
a fourth layer of the second buffer layer on the third layer of the second buffer layer, wherein the fourth layer of the second buffer layer comprises Al z Ga 1-z N.
4. The HEMT of claim 1 , wherein the third buffer layer comprises:
a third layer of the third buffer layer on the second layer of the third buffer layer, wherein the third layer of the third buffer layer comprises Al q Ga 1-q N; and
a fourth layer of the third buffer layer on the third layer of the third buffer layer, wherein the fourth layer of the third buffer layer comprises Al p Ga 1-p N.
5. The HEMT of claim 1 , wherein a thickness of the first layer of the first buffer layer is equal to a thickness of the first layer of the second buffer layer.
6. The HEMT of claim 1 , wherein a thickness of the second layer of the first buffer layer is equal to a thickness of the second layer of the second buffer layer.
7. The HEMT of claim 1 , wherein a thickness of the second layer of the first buffer layer is less than a thickness of the first layer of the first buffer layer.
8. The HEMT of claim 1 , wherein a thickness of the second layer of the second buffer layer is less than a thickness of the first layer of the second buffer layer.
9. The HEMT of claim 1 , further comprising:
an unintentionally doped (UID) buffer layer on the buffer layer;
a barrier layer on the UID buffer layer;
a gate electrode on the barrier layer; and
a source electrode and a drain electrode adjacent to two sides of the gate electrode.
10. A high electron mobility transistor (HEMT), comprising:
a nucleation layer on a substrate;
a buffer layer on the nucleation layer, wherein the buffer layer comprises:
a first buffer layer comprising:
a first layer of the first buffer layer on and directly contacting a top surface of the nucleation layer, wherein the first layer of the first buffer layer comprises Al y Ga 1-y N;
a second layer of the first buffer layer on a top surface of the first layer of the first buffer layer, wherein the second layer of the first buffer layer comprises Al x Ga 1-x N;
a second buffer layer comprising:
a first layer of the second buffer layer on and directly contacting the first buffer layer, wherein the first layer of the second buffer layer comprises Al w Ga 1-w N and the first layer of the second buffer layer is made of a single material; and
a second layer of the second buffer layer on a top surface of the first layer of the second buffer layer, wherein the second layer of the second buffer layer comprises Al z Ga 1-z N, the second layer of the second buffer layer is made of a single material, a total thickness of the second layer of the first buffer layer is less than a total thickness of the second layer of the second buffer layer, and a total thickness of the first layer of the first buffer layer is less than a total thickness of the first layer of the second buffer layer;
a third buffer layer comprising:
a first layer of the third buffer layer on the second buffer layer, wherein the first layer of the third buffer layer comprises Al q Ga 1-q N; and
a second layer of the third buffer layer on the first layer of the third buffer layer, wherein the second layer of the third buffer layer comprises Al p Ga 1-p N and x=z=p>y=w=q.
11. The HEMT of claim 10 , wherein the first buffer layer comprises:
a third layer of the first buffer layer on the second layer of the first buffer layer, wherein the third layer of the first buffer layer comprises Al y Ga 1-y N; and
a fourth layer of the first buffer layer on the third layer of the first buffer layer, wherein the fourth layer of the first buffer layer comprises Al x Ga 1-x N.
12. The HEMT of claim 10 , wherein the second buffer layer comprises:
a third layer of the second buffer layer on the second layer of the second buffer layer, wherein the third layer of the second buffer layer comprises Al w Ga 1-w N; and
a fourth layer of the second buffer layer on the third layer of the second buffer layer, wherein the fourth layer of the second buffer layer comprises Al z Ga 1-z N.
13. The HEMT of claim 10 , wherein the third buffer layer comprises:
a third layer of the third buffer layer on the second layer of the third buffer layer, wherein the third layer of the third buffer layer comprises Al q Ga 1-q N; and
a fourth layer of the third buffer layer on the third layer of the third buffer layer, wherein the fourth layer of the third buffer layer comprises Al p Ga 1-p N.
14. The HEMT of claim 10 , wherein a thickness of the second layer of the second buffer layer is less than a thickness of the second layer of the third buffer layer.
15. The HEMT of claim 10 , wherein a thickness of the second layer of the third buffer layer is less than a thickness of the first layer of the first buffer layer.
16. The HEMT of claim 10 , wherein a thickness of the first layer of the second buffer layer is less than a thickness of the first layer of the third buffer layer.
17. The HEMT of claim 10 , further comprising:
an unintentionally doped (UID) buffer layer on the buffer layer;
a barrier layer on the UID buffer layer;
a gate electrode on the barrier layer; and
a source electrode and a drain electrode adjacent to two sides of the gate electrode.