IP Library › Granted Patent US 11,264,166
Granted Patent B2
US 11,264,166 · App. 16/593,692 · Granted Mar 1, 2022

Interposer and electronic component including the same

Inventors: Su Rim Bae (Suwon-si, KR); Jong Pil Lee (Suwon-si, KR); Hae In Kim (Suwon-si, KR); Eun Ju Oh (Suwon-si, KR)
Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
H01G2/065H01G4/005H01G4/12H01G4/228H01G4/30H05K1/141H05K1/181H05K2201/049H05K2201/10015H05K2201/10378H05K2201/2045
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Quick Facts
Patent No.
US 11,264,166
App. No.
16/593,692
Granted
Mar 1, 2022
Kind
B2
Abstract

An interposer includes an interposer body; first and second lower patterns spaced apart from each other on a lower surface of the interposer body; and first and second upper patterns spaced apart from each other on an upper surface of the interposer body. The first and second upper patterns include first and second shape-securing layers spaced apart from each other on the upper surface of the interposer body, and first and second acoustic noise reduction layers disposed on the first and second shape-securing layers, respectively. An electronic component includes a capacitor and the interposer.

Claims (48)

1. An interposer comprising:

an interposer body;

first and second lower conductive patterns spaced apart from each other on a lower surface of the interposer body; and

first and second upper conductive patterns spaced apart from each other on an upper surface of the interposer body,

wherein the first and second upper conductive patterns comprise first and second conductive layers spaced apart from each other on the upper surface of the interposer body, and third and fourth conductive layers disposed on the first and second conductive layers, respectively,

wherein the third and fourth conductive layers have thicknesses of 20 μm or less, respectively,

wherein a number of layers in one of the first and second lower conductive patterns is less than a number of layers in one of the first and second upper conductive patterns,

wherein areas of the third and fourth conductive layers are smaller than areas of the first and second conductive layers, respectively, and

wherein the first and second conductive layers and the third and fourth conductive layers include a same material.

2. The interposer of claim 1 , wherein thicknesses of the first and second lower conductive patterns are 10 μm or less, respectively.

3. The interposer of claim 1 , wherein the first and second conductive layers have thicknesses of 10 μm or less, respectively.

4. The interposer of claim 1 , wherein an area ratio of the area of the third conductive layer compared to the area of the first conductive layer or an area ratio of the area of the fourth conductive layer compared to the area of the second conductive layer does not exceed 81.43%.

5. The interposer of claim 1 , further comprising a marking portion disposed between the first and second upper conductive patterns on the upper surface of the interposer body.

6. The interposer of claim 1 , further comprising:

a first conductive via penetrating the interposer body, and connecting the first lower conductive pattern and the first upper conductive pattern to each other; and

a second conductive via penetrating the interposer body, and connecting the second lower conductive pattern and the second upper conductive pattern to each other.

7. The interposer of claim 1 , wherein the first upper conductive pattern is thicker than the first lower conductive pattern, and the second upper conductive pattern is thicker than the second lower conductive pattern.

8. The interposer of claim 1 , wherein the first and second conductive layers are shape-securing layers, respectively, and the third and fourth conductive layers are acoustic noise reduction layers, respectively.

9. An interposer comprising:

an interposer body;

first and second lower conductive patterns spaced apart from each other on a lower surface of the interposer body;

first and second upper conductive patterns spaced apart from each other on an upper surface of the interposer body; and

a plating layer on surfaces of the first lower conductive pattern, the first upper conductive pattern, the second lower conductive pattern, and the second upper conductive pattern,

wherein the first and second upper conductive patterns comprise first and second conductive layers spaced apart from each other on the upper surface of the interposer body, and third and fourth conductive layers disposed on the first and second conductive layers, respectively,

wherein the third and fourth conductive layers have thicknesses of 20 μm or less, respectively, and

wherein a number of layers in one of the first and second lower conductive patterns is less than a number of layers in one of the first and second upper conductive patterns.

10. The interposer of claim 9 , wherein a length of one of the first and second upper conductive patterns in a longitudinal direction of the interposer is 0.450 to 0.600 mm.

11. An electronic component comprising:

a multilayer capacitor including a capacitor body and first and second external electrodes respectively disposed on both ends of the capacitor body; and

an interposer including an interposer body and first and second external terminals respectively disposed on both ends of the interposer body,

wherein the first and second external terminals of the interposer comprise: first and second lower conductive patterns spaced apart from each other on a lower surface of the interposer body; and first and second upper conductive patterns spaced apart from each other on an upper surface of the interposer body, and connected to the first and second external electrodes, respectively,

wherein the first and second upper conductive patterns comprise first and second conductive layers spaced apart from each other on the upper surface of the interposer body, and third and fourth conductive layers disposed on the first and second conductive layers, respectively,

wherein areas of the third and fourth conductive layers are smaller than areas of the first and second conductive layers, respectively, and

wherein the electronic component further comprises:

a first conductive bonding agent disposed between the first upper conductive pattern and the first external electrode; and

a second conductive bonding agent disposed between the second upper conductive pattern and the second external electrode.

12. The electronic component of claim 11 , wherein thicknesses of the first and second lower conductive patterns of the interposer are 10 μm or less, respectively.

13. The electronic component of claim 11 , wherein the first and second conductive layers have thicknesses of 10 μm or less, respectively, and the third and fourth conductive layers have thicknesses of 20 μm or less, respectively.

14. The electronic component of claim 11 , wherein an area ratio of the area of the third conductive layer compared to the area of the first conductive layer or an area ratio of the area of the fourth conductive layer compared to the area of the second conductive layer does not exceed 81.42%.

15. The electronic component of claim 11 , further comprising a marking portion disposed between the first and second upper conductive patterns on the upper surface of the interposer body.

16. The electronic component of claim 11 , wherein the capacitor body of the multilayer capacitor has first and second surfaces opposing each other, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth surfaces connected to the first and second surfaces and the third and fourth surfaces and opposing each other, comprises a plurality of dielectric layers and a plurality of first and second internal electrodes disposed alternately with the dielectric layers interposed therebetween,

wherein one ends of the first and second internal electrodes connected to first and second external electrodes, respectively.

17. The electronic component of claim 16 , wherein the first and second external electrodes comprise first and second head portions disposed on the third and fourth surfaces of the capacitor body, respectively; and

first and second band portions extending from the first and second head portions to a portion of the first surface of the capacitor body.

18. The electronic component of claim 11 , wherein the first and second conductive layers are shape-securing layers, respectively, and the third and fourth conductive layers are acoustic noise reduction layers, respectively.

19. The electronic component of claim 11 ,

wherein the third and fourth conductive layers have thicknesses of 20 μm or less, respectively, and

wherein a number of layers in one of the first and second lower conductive patterns is less than a number of layers in one of the first and second upper conductive patterns.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2019
From: BAE, SU RIM; LEE, JONG PIL; KIM, HAE IN; OH, EUN JU
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 050633/0740 →
Priority Claims (1)
KR 10-2019-0048884 · Apr 26, 2019 · national
Continuity (1)
Related Publication 20200343044A1 · Oct 29, 2020
Cited By (1)
US 12,224,120