Chip antenna
A chip antenna includes a first ceramic substrate, a second ceramic substrate disposed to oppose the first ceramic substrate, a first patch, disposed on the first ceramic substrate, configured to operate as a feed patch, a second patch, disposed on the second ceramic substrate, configured to operate as a radiation patch, an insertion member disposed between the first ceramic substrate and the second ceramic substrate, and a shielding layer disposed on a side surface of the insertion member.
1. A chip antenna comprising:
a first substrate;
a second substrate disposed to oppose the first substrate;
a patch including a conductive material and disposed between the first substrate and the second substrate;
an insertion member disposed to form a dielectric medium having a dielectric constant lower than dielectric constants of first and second substrates between the first substrate and the second substrate; and
a shielding layer disposed on a side surface of the insertion member.
2. The chip antenna of claim 1 , wherein the shielding layer is disposed on an entire side surface of the insertion member.
3. The chip antenna of claim 1 , wherein a portion of the side surface of the insertion member is exposed outside of the shielding layer.
4. The chip antenna of claim 3 , wherein the shielding layer extends in a circumferential direction of the insertion member, on the side surface of the insertion member.
5. The chip antenna of claim 3 , wherein the shielding layer extends in a thickness direction of the insertion member, on the side surface of the insertion member.
6. The chip antenna of claim 1 , wherein the insertion member comprises one or more of a spacer and a bonding layer disposed on the one surface of the first substrate and the one surface of the second substrate.
7. The chip antenna of claim 1 , wherein the dielectric constant of the dielectric medium comprises a dielectric constant of air.
8. The chip antenna of claim 7 , wherein the air included in the dielectric medium is exposed outside of the shielding layer.
9. The chip antenna of claim 1 , wherein the insertion member includes a polymer, and
at least one of the first and second substrates includes a ceramic.
10. The chip antenna of claim 1 , further comprising a bonding pad disposed on a lower surface of the first substrate and electrically connected to the shielding layer, and
wherein the patch is disposed on an upper surface of the first substrate.
11. The chip antenna of claim 1 , further comprising a bonding pad disposed on a lower surface of the first substrate and separated from the shielding layer, and
wherein the patch is disposed on an upper surface of the first substrate.
12. A chip antenna comprising:
a first substrate;
a second substrate disposed to oppose the first substrate;
a patch including a conductive material and disposed between the first substrate and the second substrate;
a first shielding layer disposed on a side surface of the first substrate; and
a second shielding layer disposed on a side surface of the second substrate,
wherein at least a portion of a dielectric medium between the first and second substrates is exposed outside of the first and second shielding layers.
13. The chip antenna of claim 12 , wherein the first shielding layer is disposed on an entire side surface of the first substrate, and the second shielding layer is disposed on an entire side surface of the second substrate.
14. The chip antenna of claim 12 , wherein a portion of the side surface of at least one of the first and second substrates is exposed outside of the shielding layer.
15. The chip antenna of claim 14 , wherein the first shielding layer extends in a circumferential direction of the first substrate, on the side surface of the first substrate, and
the second shielding layer extends in a circumferential direction of the second substrate, on the side surface of the second substrate.
16. The chip antenna of claim 14 , wherein the first shielding layer extends in a thickness direction of the first substrate, on the side surface of the first substrate, and
the second shielding layer extends in a thickness direction of the second substrate, on the side surface of the second substrate.
17. The chip antenna of claim 12 , further comprising a bonding pad disposed on a lower surface of the first substrate and electrically connected to the first shielding layer, and
wherein the patch is disposed on an upper surface of the first substrate.
18. The chip antenna of claim 17 , wherein the first and second shielding layers are separated from each other.
19. The chip antenna of claim 12 , wherein the dielectric medium between the first and second substrates includes at least one of air and an insulating material.
20. The chip antenna of claim 12 , wherein at least one of the first and second substrates includes a ceramic having a dielectric constant higher than a dielectric constant of an insulating material of the dielectric medium between the first and second substrates.