IP Library › Granted Patent US 11,270,962
Granted Patent B2
US 11,270,962 · App. 16/665,408 · Granted Mar 8, 2022

Semiconductor device and method of manufacturing the same

Inventors: Chiang-Lin Shih (New Taipei, TW); Pei-Jhen Wu (Taipei, TW); Ching-Hung Chang (Taoyuan, TW); Hsih-Yang Chiu (Taoyuan, TW)
Assignee: NANYA TECHNOLOGY CORPORATION
H01L24/05H01L21/76895H01L23/5226H01L24/03H01L24/08H01L24/80H01L2224/039H01L2224/05547H01L2224/05556H01L2224/05571H01L2224/05647H01L2224/08147H01L2224/80895H01L2224/80896
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,270,962
App. No.
16/665,408
Granted
Mar 8, 2022
Kind
B2
Abstract

The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor component, a re-routing layer, a bonding dielectric and an insulating layer. The re-routing layer is disposed over the semiconductor component and electrically coupled to the semiconductor component. The bonding dielectric is disposed over the semiconductor component to surround a top portion of the re-routing layer. The insulating layer is disposed between the semiconductor component and the bonding dielectric to surround a bottom portion of the re-routing layer.

Claims (12)

1. A semiconductor device, comprising:

a semiconductor component;

a re-routing layer disposed over and electrically coupled to the semiconductor component;

an interconnect layer, containing at least one metallic pad, between the semiconductor component and the re-routing layer to electrically couple the semiconductor component to the re-routing layer, wherein the metal pad includes a material different from a material of the re-routing layer;

a bonding dielectric over the semiconductor component and surrounding a top portion of the re-routing layer; and

an insulating layer between the semiconductor component and the bonding dielectric to surround a bottom portion of the re-routing layer;

wherein the insulating layer comprises an underlying film over the semiconductor component and an overlying film between the underlying film and the bonding dielectric, wherein the underlying film includes silicon dioxide, and the overlying film includes silicon nitride, wherein the underlying film and the overlying film surround the bottom portion of the re-routing layer, wherein the overlying film may have an etching rate different from that of the underlying film.

2. The semiconductor device of claim 1 , wherein the bottom portion has a first width, and the top portion, integrated with the bottom portion, has a second width that is greater than the first width when viewed in a cross-sectional view.

3. The semiconductor device of claim 2 , wherein the first width gradually increases at positions of increasing distance from the semiconductor component.

4. The semiconductor device of claim 2 , wherein the insulating layer contacts the top portion.

5. The semiconductor device of claim 1 , wherein the bonding dielectric has a first thickness, and the insulating layer has a second thickness that is less than the first thickness.

6. The semiconductor device of claim 1 , further comprising a diffusion barrier layer between the bonding dielectric and the top portion of the re-routing layer and between the insulating layer and the bottom portion of the re-routing layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 4, 2019
From: SHIH, CHIANG-LIN; WU, PEI-JHEN; CHANG, CHING-HUNG; CHIU, HSIH-YANG
To: NANYA TECHNOLOGY CORPORATION
Reel/Frame 050904/0849 →
Continuity (1)
Related Publication 20210125947A1 · Apr 29, 2021