IP Library Granted Patent US 11,272,003
Granted Patent B2
US 11,272,003 · App. 16/882,438 · Granted Mar 8, 2022

Network device synchronization method and network device

Inventors: Jingfei Lv (Wuhan, CN); Yawei Zhang (Beijing, CN)
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
H04L67/1095H04J3/0638
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Quick Facts
Patent No.
US 11,272,003
App. No.
16/882,438
Granted
Mar 8, 2022
Kind
B2
Abstract

A network device synchronization method is provided. In various embodiments, a first SSM and a second SSM are received. The first SSM carries a first SSM code indicating a quality level of a first clock source and a first eSSM code indicating the quality level of the first clock source, the second SSM carries a second SSM code indicating a quality level of a second clock source. The second SSM lacks an eSSM code indicating the quality level of the second clock source, and a value of the first SSM code is equal to a value of the second SSM code. When a value of the first eSSM code is less than 0xFF, calibrating a frequency of the network device based on a timing signal of the first clock source.

Claims (38)

1. A network device synchronization method, comprising:

receiving, by the network device, a first synchronization status message (SSM) and a second SSM, wherein

the first SSM carries a first SSM code indicating a quality level of a first clock source and a first enhanced synchronization status message (eSSM) code indicating the quality level of the first clock source, and

the second SSM carries a second SSM code indicating a quality level of a second clock source, the second SSM lacking an eSSM code indicating the quality level of the second clock source, and a value of the first SSM code being equal to a value of the second SSM code; and

when a value of the first eSSM code is less than 0xFF, calibrating, by the network device, a frequency of the network device based on a timing signal of the first clock source.

2. The method according to claim 1 , wherein the method further comprises:

when the value of the first eSSM code is equal to 0xFF, and a value of a number of cascaded synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is less than 0xFF, calibrating, by the network device, the frequency of the network device based on the timing signal of the first clock source.

3. The method according to claim 1 , wherein the method further comprises:

when the value of the first eSSM code is equal to 0xFF, the value of the number of cascaded synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is equal to 0xFF, and a value of a number of cascaded enhanced synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is less than 0xFF, calibrating, by the network device, the frequency of the network device based on the timing signal of the first clock source.

4. The method according to claim 1 , wherein the method further comprises:

when the value of the first eSSM code is equal to 0xFF, the value of the number of cascaded synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is equal to 0xFF, the value of the number of cascaded enhanced synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is equal to 0xFF, and a value of a synchronous Ethernet master identifier (SyncE Master ID) in the first SSM is less than 0xFFFFFFFFFFFFFFFF, calibrating, by the network device, the frequency of the network device based on the timing signal of the first clock source.

5. A network device, comprising:

a non-transitory memory storing instructions; and

a processor coupled to the non-transitory memory; wherein the instructions, when executed by the processor, cause the network device to be configured to:

receive a first synchronization status message (SSM) and a second SSM, wherein

the first SSM carries a first SSM code indicating a quality level of a first clock source and a first enhanced synchronization status message (eSSM) code indicating the quality level of the first clock source, and

the second SSM carries a second SSM code indicating a quality level of a second clock source, the second SSM lacking an eSSM code indicating the quality level of the second clock source, and a value of the first SSM code being equal to a value of the second SSM code; and

when a value of the first eSSM code is less than 0xFF, calibrate a frequency of the network device based on a timing signal of the first clock source.

6. The device according to claim 5 , wherein the instructions, when executed by the processor, further cause the network device to be configured to:

when the value of the first eSSM code is equal to 0xFF, and a value of a number of cascaded synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is less than 0xFF, calibrate the frequency of the network device based on the timing signal of the first clock source.

7. The device according to claim 5 , wherein the instructions, when executed by the processor, further cause the network device to be configured to:

when the value of the first eSSM code is equal to 0xFF, the value of the number of cascaded synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is equal to 0xFF, and a value of a number of cascaded enhanced synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is less than 0xFF, calibrate the frequency of the network device based on the timing signal of the first clock source.

8. The device according to claim 5 , wherein the instructions, when executed by the processor, further cause the network device to be configured to:

when the value of the first eSSM code is equal to 0xFF, the value of the number of cascaded synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is equal to 0xFF, the value of the number of cascaded enhanced synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is equal to 0xFF, and a value of a synchronous Ethernet master identifier (SyncE Master ID) in the first SSM is less than 0xFFFFFFFFFFFFFFFF, calibrate the frequency of the network device based on the timing signal of the first clock source.

9. A network device, comprising a first port, a second port, a processor, and a clock circuit, wherein the first port is coupled to the processor, the second port is coupled to the processor, the clock circuit is coupled to the first port, and the clock circuit is coupled to the second port;

the first port is configured to receive a first SSM, wherein the first SSM carries a first SSM code indicating a quality level of a first clock source and a first eSSM code indicating the quality level of the first clock source;

the second port is configured to receive a second SSM, wherein the second SSM carries a second SSM code indicating a quality level of a second clock source, the second SSM lacking an eSSM code indicating the quality level of the second clock source, and a value of the first SSM code being equal to a value of the second SSM code;

the processor is configured to: when a value of the first eSSM code is less than 0xFF, instruct the first port to provide a timing signal of the first clock source for the clock circuit; and

the clock circuit is configured to calibrate a frequency of the network device based on the timing signal of the first clock source.

10. The device according to claim 9 , wherein the processor is further configured to:

when the value of the first eSSM code is equal to 0xFF, and a value of a number of cascaded synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is less than 0xFF, instruct the first port to provide the timing signal of the first clock source for the clock circuit, wherein

the clock circuit is further configured to calibrate the frequency of the network device based on the timing signal of the first clock source.

11. The device according to claim 9 , wherein the processor is further configured to:

when the value of the first eSSM code is equal to 0xFF, the value of the number of cascaded synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is equal to 0xFF, and a value of a number of cascaded enhanced synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is less than 0xFF, instruct the first port to provide the timing signal of the first clock source for the clock circuit, wherein

the clock circuit is further configured to calibrate the frequency of the network device based on the timing signal of the first clock source.

12. The device according to claim 9 , wherein the processor is further configured to:

when the value of the first eSSM code is equal to 0xFF, the value of the number of cascaded synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is equal to 0xFF, the value of the number of cascaded enhanced synchronous Ethernet equipment clocks from the nearest synchronization supply unit/primary reference clock in the first SSM is equal to 0xFF, and a value of a synchronous Ethernet master identifier (SyncE Master ID) in the first SSM is less than 0xFFFFFFFFFFFFFFFF, instruct the first port to provide the timing signal of the first clock source for the clock circuit, wherein

the clock circuit is further configured to calibrate the frequency of the network device based on the timing signal of the first clock source.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2020
From: LV, JINGFEI; ZHANG, YAWEI
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 054158/0731 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2020
From: LV, JINGFEI; ZHANG, YAWEI
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 054158/0172 →
Continuity (2)
Continuation PCTCN2017112914 · Nov 24, 2017
Related Publication 20200287969A1 · Sep 10, 2020