IP Library › Granted Patent US 11,275,670
Granted Patent B2
US 11,275,670 · App. 16/970,771 · Granted Mar 15, 2022

Tracing branch instructions

Inventor: John Michael Horley (Hauxton, GB)
Assignee: Arm Limited
G06F11/348G06F9/30058G06F9/321G06F11/076G06F11/0721G06F11/3636G06F2201/88
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Quick Facts
Patent No.
US 11,275,670
App. No.
16/970,771
Granted
Mar 15, 2022
Kind
B2
Abstract

An apparatus comprises data processing circuitry to perform data processing operations in response to a sequence of instructions, where the sequence of instructions comprises branch instructions. Trace generating circuitry generates a trace stream of trace items indicative of the data processing operations. The trace generating circuitry is responsive to one or more not-taken branch instructions followed by a taken branch instruction in the sequence of instructions to: include at least one not-taken trace item corresponding to the one or more not-taken branch instructions followed by a taken trace item in the trace stream when a current status condition of the apparatus is met, and to include a source address associated with the taken branch instruction in the trace stream when the current status condition of the apparatus is not met. A hybrid approach between tracing not-taken branch instructions and tracing a source address associated with the taken branch instruction is thus provided.

Claims (33)

1. An apparatus comprising:

data processing circuitry to perform data processing operations in response to a sequence of instructions, wherein the sequence of instructions comprises branch instructions; and

trace generating circuitry to generate a trace stream of trace items indicative of the data processing operations,

wherein the trace generating circuitry is responsive to one or more not-taken branch instructions followed by a taken branch instruction in the sequence of instructions to:

include at least one not-taken trace item corresponding to the one or more not-taken branch instructions followed by a taken trace item in the trace stream when a current status condition of the apparatus is met; and

to include a source address associated with the taken branch instruction in the trace stream when the current status condition of the apparatus is not met,

wherein:

the current status condition comprises a multiplicity of the one or more not-taken branch instructions being less than a threshold value;

the apparatus further comprises a not-taken counter responsive to a not-taken branch instruction to increment; and

the trace generating circuitry is responsive to occurrence of an exception in the data processing circuitry to include in the trace stream an exception trace item indicative of a point in the sequence of instructions at which the exception occurred and to reset the not-taken counter.

2. The apparatus of claim 1 , wherein the not-taken counter is a saturating counter arranged to saturate at the threshold value.

3. The apparatus of claim 1 , wherein the not-taken counter comprises a one-bit storage element.

4. The apparatus of claim 1 , wherein the not-taken counter comprises a multiple-bit storage element.

5. The apparatus of claim 1 , wherein the trace generating circuitry is responsive to the taken branch instruction in the sequence of instructions to include as many not-taken trace items in the trace stream as the not-taken counter indicates when the current status condition of the apparatus is met.

6. The apparatus of claim 1 , wherein the trace generating circuitry is responsive to occurrence of an exception in the data processing circuitry to include as many not-taken trace items in the trace stream as the not-taken counter indicates.

7. The apparatus of claim 1 , wherein the threshold value is a predetermined static value for the apparatus.

8. The apparatus of claim 1 , wherein the threshold value is a variable value.

9. The apparatus of claim 8 , wherein the trace generating circuitry is responsive to a current resource usage indication for the apparatus to dynamically set the threshold value.

10. The apparatus of claim 9 , wherein the current resource usage indication for the apparatus indicates current occupancy of a storage element in the apparatus.

11. The apparatus of claim 1 , wherein the current status condition of the apparatus comprises a current occupancy of a storage element in the apparatus.

12. The apparatus of claim 1 , wherein the taken trace item is an indication that a branch for the taken branch instruction was taken.

13. The apparatus of claim 1 , wherein the taken trace item is the source address associated with the branch instruction.

14. The apparatus of claim 1 , wherein the taken trace item is an indication that a branch for the taken branch instruction was taken preceded by the source address associated with the branch instruction.

15. The apparatus of claim 1 , wherein the taken trace item further comprises an indication of a target address for the branch, when the branch is an indirect branch.

16. The apparatus of claim 1 , wherein the trace generating circuitry is responsive to an indication that the data processing circuitry has removed at least one branch instruction from the sequence of instructions in a performance improvement procedure to determine that the current status condition of the apparatus is not met.

17. A method of operating an apparatus comprising:

performing, with data processing circuitry, data processing operations in response to a sequence of instructions, wherein the sequence of instructions comprises branch instructions;

generating a trace stream of trace items indicative of the data processing operations,

wherein when one or more not-taken branch instructions are followed by a taken branch instruction in the sequence of instructions the generating a trace stream of trace items indicative of the data processing operations comprises:

including at least one not-taken trace item corresponding to the one or more not-taken branch instructions followed by a taken trace item in the trace stream when a current status condition of the apparatus is met;

including a source address associated with the taken branch instruction in the trace stream a current status condition of the apparatus when the current status condition of the apparatus is not met, wherein the current status condition comprises a multiplicity of the one or more not-taken branch instructions being less than a threshold value;

incrementing a not-taken counter in response to a not-taken branch instruction; and

including in the trace stream, in response to occurrence of an exception in the data processing circuitry, an exception trace item indicative of a point in the sequence of instructions at which the exception occurred and to reset the not-taken counter.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 18, 2020
From: HORLEY, JOHN MICHAEL
To: ARM LIMITED
Reel/Frame 053525/0721 →
Priority Claims (1)
GB GB1803991.7 · Mar 13, 2018 · national
Continuity (1)
Related Publication 20200371891A1 · Nov 26, 2020