Semiconductor device and manufacturing method
A semiconductor memory device includes a stacked structure and a memory pillar. The stacked structure includes electrode layers and insulating layers alternately provided on a substrate. The memory pillar extends through the stacked structure in a thickness direction. The memory pillar includes a semiconductor layer extending along the thickness direction, and a first insulating film, a charge storage layer, and a second insulating film provided around the semiconductor layer. The charge storage layer contains fluorine, and a fluorine concentration in the charge storage layer has a gradient along a plane direction of the substrate with a peak. A first distance from an inner end of the charge storage layer to the peak in the plane direction is shorter than a second distance from an outer end of the charge storage layer to the peak in the plane direction.
1. A semiconductor memory device, comprising:
a stacked structure including a plurality of electrode layers and a plurality of insulating layers that are alternately provided on a substrate; and
a memory pillar extending through the stacked structure in a thickness direction, the memory pillar including a semiconductor layer extending along the thickness direction, a first insulating film surrounding the semiconductor layer, a charge storage layer surrounding the first insulating film, and a second insulating film surrounding the charge storage layer, wherein
the charge storage layer contains fluorine, and a fluorine concentration in the charge storage layer has a gradient along a plane direction of the substrate with a peak, and
a first distance from an inner end of the charge storage layer to the peak in the plane direction is shorter than a second distance from an outer end of the charge storage layer to the peak in the plane direction.
2. The semiconductor memory device according to claim 1 , wherein the fluorine concentration at the peak is 1.0×10 20 cm −3 or higher.
3. The semiconductor memory device according to claim 1 , wherein the fluorine concentration at the peak is 1.0×10 22 cm −3 or lower.
4. The semiconductor memory device according to claim 1 , wherein a half width at half maximum of the peak in the plane direction is 2.5 nm or less.
5. The semiconductor memory device according to claim 1 , wherein the peak is at the inner end of the charge storage layer.
6. The semiconductor memory device according to claim 1 , wherein the charge storage layer is an insulating film containing silicon and nitrogen.
7. The semiconductor memory device according to claim 1 , wherein the fluorine concentration in the charge storage layer has a second peak farther from the inner end of the charge storage layer than the peak.
8. The semiconductor memory device according to claim 7 , wherein the second peak is between the peak and the outer end of the charge storage layer.
9. The semiconductor memory device according to claim 7 , wherein the second peak is at the outer end of the charge storage layer.
10. The semiconductor memory device according to claim 7 , wherein the fluorine concentration at each of the peak and the second peak is between 1.0×10 20 cm −3 and 1.0×10 22 cm −3 .
11. The semiconductor memory device according to claim 7 , wherein the fluorine concentration in the charge storage layer has a third peak farther from the inner end of the charge storage layer than the second peak.
12. The semiconductor memory device according to claim 11 , wherein the third peak is between the second peak and the outer end of the charge storage layer.
13. The semiconductor memory device according to claim 11 , wherein the third peak is at the outer end of the charge storage layer.
14. The semiconductor memory device according to claim 11 , wherein the fluorine concentration at each of the peak, the second peak, and the third peak is between 1.0×10 20 cm −3 and 1.0×10 22 cm −3 .
15. The semiconductor memory device according to claim 1 , wherein the first insulating film is in direct contact with an inner surface of the charge storage layer.
16. The semiconductor memory device according to claim 1 , wherein the second insulating film is in direct contact with an outer surface of the charge storage layer.