Capping layers in metal gates of transistors

1. A method of forming a semiconductor device, the method comprising:

forming a gate electrode in a wafer comprising:

depositing a work-function layer;

depositing a first metal capping layer over the work-function layer;

performing a first treatment on the first metal capping layer using TiCl 4 ;

performing a second treatment on the first metal capping layer that has been treated by the first treatment, wherein the second treatment is performed using a silicon-containing gas; and

depositing a filling metal over the first metal capping layer.

2. The method of claim 1 , wherein the second treatment is performed using silane or disilane.

3. The method of claim 1 , wherein the first treatment and the second treatment are performed in a same vacuum environment, and the method further comprises, after the second treatment, performing a vacuum break to expose a silicon-containing layer formed on the first metal capping layer to air.

4. The method of claim 1 further comprising, after the second treatment and before the filling metal is deposited, exposing a respective layer that is treated by the second treatment to air through a vacuum break.

5. The method of claim 1 further comprising, after the second treatment, depositing a second metal capping layer, wherein the second metal capping layer is over the first metal capping layer.

6. The method of claim 5 further comprising:

performing a third treatment on the second metal capping layer using an additional silicon-containing gas; and

after the third treatment, performing a vacuum break to expose the second metal capping layer to air, wherein the second treatment and the depositing the second metal capping layer are in-situ performed without vacuum break in between.

7. The method of claim 6 , wherein in the second treatment, silicon-containing molecules in the silicon-containing gas are attached to the second metal capping layer, and during the vacuum break, the silicon-containing molecules are oxidized to form a silicon oxide layer.

8. The method of claim 1 , wherein the forming the first metal capping layer comprises depositing a TiN layer.

9. The method of claim 1 further comprising:

before the forming the gate electrode, removing a dummy gate stack, wherein the gate electrode is formed to extend into a trench left by the removed dummy gate stack, and the forming the gate electrode comprises:

performing a planarization process to remove portions of the work-function layer, the first metal capping layer, and the filling metal outside of the trench.

10. A method of forming a semiconductor device, the method comprising:

forming a semiconductor fin protruding higher than isolation regions on opposite side of the semiconductor fin;

forming a dummy gate stack on a portion of the semiconductor fin;

forming a source/drain region based on the semiconductor fin, wherein the source/drain region is on a side of the dummy gate stack;

depositing an inter-layer dielectric to cover the source/drain region;

removing the dummy gate stack to leave a trench in the inter-layer dielectric;

forming a gate dielectric layer extending into the trench;

depositing a work-function layer over the gate dielectric layer;

forming a first metal capping layer over the work-function layer;

performing a first treatment on the first metal capping layer using TiCl 4 ;

after the first treatment, performing a second treatment on the first metal capping layer using a silicon-containing gas;

after the second treatment, forming a second metal capping layer over the work-function layer, wherein the first treatment, the forming the second metal capping layer, and the second treatment are in-situ performed in a same vacuum environment; and

performing a vacuum break to expose the second metal capping layer to air.

11. The method of claim 10 , wherein the second treatment results in a silicon-containing layer to be formed on the first metal capping layer, and the vacuum break results in a silicon-oxide-containing layer to be formed, and the second metal capping layer is formed over the silicon-oxide-containing layer.

12. The method of claim 11 , wherein the first metal capping layer and the second metal capping layer are formed of a same material.

13. The method of claim 10 , wherein the first treatment is performed without generating plasma from the silicon-containing gas.

14. A method of forming a semiconductor device, the method comprising:

depositing a first metal capping layer on a work-function layer;

performing a silicon-containing gas soaking process on the first metal capping layer to form a silicon-containing layer on the first metal capping layer, wherein the depositing the first metal capping layer and the silicon-containing gas soaking process are performed without vacuum break in between;

oxidizing the silicon-containing layer to form a silicon-oxide-containing layer, wherein the oxidizing is performed by performing a vacuum break;

depositing a second metal capping layer over the silicon-oxide-containing layer, wherein the first metal capping layer and the second metal capping layer are formed of a same material; and

forming a filling-metal region over the second metal capping layer.

15. The method of claim 14 , wherein the silicon-containing gas soaking process is performed at an elevated temperature.

16. The method of claim 14 further comprising forming a gate electrode of a transistor, with the first metal capping layer, the silicon-oxide-containing layer, the second metal capping layer, and the filling-metal region being parts of the gate electrode.

17. The method of claim 14 , wherein the silicon-containing gas soaking process is performed using silane or disilane.

18. The method of claim 14 further comprising:

before the silicon-containing gas soaking process, soaking the first metal capping layer in TiCl 4 .

19. The method of claim 14 , wherein the forming the first metal capping layer and the forming the second metal capping layer both comprise depositing a TiN layer.

20. The method of claim 6 , wherein the first metal capping layer and the second metal capping layer are formed of a same material, and the first metal capping layer and the second metal capping layer are formed in a same vacuum environment without vacuum break in between.