IP Library › Granted Patent US 11,288,188

Granted Patent B1

US 11,288,188 · App. 17/154,345 · Granted Mar 29, 2022

Dynamic metadata relocation in memory

Inventors: Gopi Tummala (Sunnyvale, CA); Hirai Nandu (South San Francisco, CA); Subbarao Palacharla (San Diego, CA); Syed Minhaj Hassan (San Diego, CA); Sai Ramesh Bhyravajosula (San Diego, CA); Anurag Nannaka (San Diego, CA)

Assignee: QUALCOMM Incorporated

G06F12/0646 G06F2212/1041 G11C11/401

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Quick Facts

Patent No.: US 11,288,188
App. No.: 17/154,345
Filed: Jan 21, 2021
Granted: Mar 29, 2022
Kind: B1
Examiner: HIDALGO, FERNANDO N
Art Unit: 2827
USPC: 711/105

External Links

USPTO Patent Center↗ Full Patent PDF↗

Abstract

Metadata is dynamically relocated in a DRAM from a virtual page that does not map to the same DRAM row in which the associated data is located, to that same DRAM row. If the target of a data access request is a location in a first page that is configured to store metadata rather than data, then a second location in a second page may be determined, and the requested data may be accessed at the second location. The associated metadata may be accessed at the location in the first page, which is configured in the virtual domain to store data but is configured in the physical domain to store the metadata associated with the data in the first page.

Claims (80)

1. A method for metadata relocation in a dynamic random access memory (DRAM), comprising:

receiving a first request to access first data at a first data location in a first memory page of the DRAM and associated metadata in a second memory page of the DRAM;

determining whether the first data location in the first memory page is configured to store metadata;

accessing the first data at the first data location in the first memory page if the first data location in the first memory page is not configured to store metadata;

determining a metadata location in the first memory page if the first data location in the first memory page is not configured to store metadata;

accessing the associated metadata at the metadata location in the first memory page if the first data location in the first memory page is not configured to store metadata;

determining a second data location in the second memory page if the first data location in the first memory page is configured to store metadata;

accessing the first data at the second data location in the second memory page if the first data location in the first memory page is configured to store metadata; and

accessing the associated metadata at the first data location in the first memory page if the first data location in the first memory page is configured to store metadata.

2. The method of claim 1 , wherein accessing the associated metadata at the metadata location in the first memory page occurs concurrently with accessing the first data at the first data location in the first memory page if the first data location in the first memory page is not configured to store metadata.

3. The method of claim 2 , wherein:

accessing the associated metadata at the metadata location in the first memory page comprises accessing a DRAM row; and

accessing the first data at the first data location in the first memory page comprises accessing the DRAM row.

4. The method of claim 1 , further comprising:

receiving a second request to access second data at a second data location in a third memory page, the second data having no associated metadata; and

accessing the second data at the second data location in the third memory page.

5. The method of claim 1 , wherein determining whether the first data location in the first memory page is configured to store metadata comprises determining whether the first data location is a last line in the first memory page.

6. The method of claim 1 , wherein accessing the first data at the first data location in the first memory page comprises accessing a last line of a plurality of lines in the first memory page.

7. The method of claim 1 , wherein accessing the associated metadata at the metadata location in the first memory page comprises accessing a last line of a plurality of lines in the first memory page, the last line comprising metadata associated with data in all other lines in the first memory page.

8. The method of claim 1 , wherein the memory has two or more bank groups, each bank group comprising two or more banks, and the metadata location in the first memory page is a last line of a last bank in each bank group.

9. A system for metadata relocation, comprising:

a dynamic random access memory (DRAM); and

a processor configured to:

receive a first request to access first data at a first data location in a first memory page and associated metadata in a second memory page;

determine whether the first data location in the first memory page is configured to store metadata;

access the first data at the first data location in the first memory page if the first data location in the first memory page is not configured to store metadata;

determine a metadata location in the first memory page if the first data location in the first memory page is not configured to store metadata;

access the associated metadata at the metadata location in the first memory page if the first data location in the first memory page is not configured to store metadata;

determine a second data location in the second memory page if the first data location in the first memory page is configured to store metadata;

access the first data at the second data location in the second memory page if the first data location in the first memory page is configured to store metadata; and

access the associated metadata at the first data location in the first memory page if the first data location in the first memory page is configured to store metadata.

10. The system of claim 9 , wherein the processor is configured to access the associated metadata at the metadata location in the first memory page concurrently with accessing the first data at the first data location in the first memory page if the first data location in the first memory page is not configured to store metadata.

11. The system of claim 10 , wherein:

the processor is configured to access the associated metadata at the metadata location in the first memory page by accessing a DRAM row; and

the processor is configured to access the first data at the first data location in the first memory page by accessing the DRAM row.

12. The system of claim 9 , wherein the processor is further configured to:

receive a second request to access second data at a second data location in a third memory page, the second data having no associated metadata; and

access the second data at the second data location in the third memory page.

13. The system of claim 9 , wherein the processor is configured to determine whether the first data location in the first memory page is configured to store metadata by determining whether the first data location is a last line in the first memory page.

14. The system of claim 9 , wherein the processor is configured to access the first data at the first data location in the first memory page by accessing a last line of a plurality of lines in the first memory page.

15. The system of claim 9 , wherein the processor is configured to access the associated metadata at the metadata location in the first memory page by accessing a last line of a plurality of lines in the first memory page, the last line comprising metadata associated with data in all other lines in the first memory page.

16. The system of claim 9 , wherein the memory has two or more bank groups, each bank group comprising two or more banks, and the metadata location in the first memory page is a last line of a last bank in each bank group.

17. A system for metadata relocation in a dynamic random access memory (DRAM), comprising:

means for receiving a first request to access first data at a first data location in a first memory page of the DRAM and associated metadata in a second memory page of the DRAM;

means for determining whether the first data location in the first memory page is configured to store metadata;

means for accessing the first data at the first data location in the first memory page if the first data location in the first memory page is not configured to store metadata;

means for determining a metadata location in the first memory page if the first data location in the first memory page is not configured to store metadata;

means for accessing the associated metadata at the metadata location in the first memory page if the first data location in the first memory page is not configured to store metadata;

means for determining a second data location in the second memory page if the first data location in the first memory page is configured to store metadata;

means for accessing the first data at the second data location in the second memory page if the first data location in the first memory page is configured to store metadata; and

means for accessing the associated metadata at the first data location in the first memory page if the first data location in the first memory page is configured to store metadata.

18. The system of claim 17 , wherein the means for accessing the associated metadata at the metadata location in the first memory page comprises means for accessing the associated metadata concurrently with accessing the first data at the first data location in the first memory page if the first data location in the first memory page is not configured to store metadata.

19. The system of claim 18 , wherein:

the means for accessing the associated metadata at the metadata location in the first memory page comprises means for accessing a DRAM row; and

the means for accessing the first data at the first data location in the first memory page comprises means for accessing the DRAM row.

20. The system of claim 17 , further comprising:

means for receiving a second request to access second data at a second data location in a third memory page, the second data having no associated metadata; and

means for accessing the second data at the second data location in the third memory page.

21. The system of claim 17 , wherein the means for determining whether the first data location in the first memory page is configured to store metadata comprises means for determining whether the first data location is a last line in the first memory page.

22. The system of claim 17 , wherein the means for accessing the first data at the first data location in the first memory page comprises means for accessing a last line of a plurality of lines in the first memory page.

23. The system of claim 17 , wherein the means for accessing the associated metadata at the metadata location in the first memory page comprises means for accessing a last line of a plurality of lines in the first memory page, the last line comprising metadata associated with data in all other lines in the first memory page.

24. The system of claim 17 , wherein the memory has two or more bank groups, each bank group comprising two or more banks, and the metadata location in the first memory page is a last line of a last bank in each bank group.

25. A computer-readable medium for metadata relocation in a dynamic random access memory (DRAM), comprising a non-transitory computer-readable medium having stored thereon in computer-executable form instructions that, when executed by a processor, configure the processor to: