IP Library › Granted Patent US 11,289,528
Granted Patent B2
US 11,289,528 · App. 16/636,147 · Granted Mar 29, 2022

Imaging apparatus

Inventor: Hirofumi Yamashita (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H01L27/14641H01L27/14612H01L27/14634H01L27/14636H01L27/14643H04N5/357H04N5/379H03F3/4521
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,289,528
App. No.
16/636,147
Granted
Mar 29, 2022
Kind
B2
Abstract

Provided is an imaging apparatus including an imaging unit having a plurality of pixels, the pixels each having: a conversion element converting incident light into photoelectrons; a floating diffusion layer electrically connected to the conversion element and converting the photoelectrons into a voltage signal; a differential amplifier circuit electrically connected to the floating diffusion layer, including an amplifier transistor to which a potential of the floating diffusion layer is input, and amplifying the potential of the floating diffusion layer; a feedback transistor electrically connected to the amplifier transistor and initializing the differential amplifier circuit; a clamp capacitance connected in series between the floating diffusion layer and the amplifier transistor; and a reset transistor connected in parallel between the floating diffusion layer and the clamp capacitance and initializing the potential of the floating diffusion layer.

Claims (20)

1. An imaging apparatus comprising an imaging unit having a plurality of pixels,

the pixels each having:

a conversion element converting incident light into photoelectrons;

a floating diffusion layer electrically connected to the conversion element and converting the photoelectrons into a voltage signal;

a differential amplifier circuit electrically connected to the floating diffusion layer, including an amplifier transistor to which a potential of the floating diffusion layer is input, and amplifying the potential of the floating diffusion layer;

a feedback transistor electrically connected to the amplifier transistor and initializing the differential amplifier circuit;

a clamp capacitance connected in series between the floating diffusion layer and the amplifier transistor; and

a reset transistor connected in parallel between the floating diffusion layer and the clamp capacitance and initializing the potential of the floating diffusion layer.

2. The imaging apparatus according to claim 1 , wherein the pixels share the floating diffusion layer, the differential amplifier circuit, the feedback transistor, the clamp capacitance, and the reset transistor.

3. The imaging apparatus according to claim 1 , wherein

the imaging unit includes a plurality of laminated boards, and

at least the conversion element, the floating diffusion layer, and the reset transistor are provided on the same board.

4. The imaging apparatus according to claim 3 , wherein the conversion element, the floating diffusion layer, part of the differential amplifier circuit including the amplifier transistor, the feedback transistor, the clamp capacitance, and the reset transistor are provided on the same board.

5. The imaging apparatus according to claim 3 , wherein the conversion element, the floating diffusion layer, the clamp capacitance, and the reset transistor are provided on the same board.

6. The imaging apparatus according to claim 3 , wherein

the conversion element, the floating diffusion layer, and the reset transistor are provided on the same board, and

the clamp capacitance is an inter-wire capacitance of a wire joining different boards together.

7. The imaging apparatus according to claim 1 , wherein

when the potential of the floating diffusion layer is initialized, the feedback transistor is in an on state, and a terminal of the amplifier transistor electrically connected to the floating diffusion layer is fixed to an initialized potential of the differential amplifier circuit, and

when the voltage signal obtained by the floating diffusion layer is detected, the feedback transistor is in an off state, and the terminal of the amplifier transistor is electrically floated.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2020
From: YAMASHITA, HIROFUMI
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 052203/0768 →
Priority Claims (1)
JP JP2017-155855 · Aug 10, 2017 · national
Continuity (1)
Related Publication 20200162685A1 · May 21, 2020
Cited By (1)
US 12,634,603