IP Library Granted Patent US 11,290,675
Granted Patent B2
US 11,290,675 · App. 17/274,133 · Granted Mar 29, 2022

Solid-state image sensor and imaging system

Inventors: Yutaka Hirose (Kyoto, JP); Akihiro Odagawa (Osaka, JP); Shinzo Koyama (Osaka, JP)
Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
H04N5/378H04N5/351H04N5/3745
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Quick Facts
Patent No.
US 11,290,675
App. No.
17/274,133
Granted
Mar 29, 2022
Kind
B2
Abstract

A solid-state image sensor capable of detecting a photon and having smaller circuit scale is provided. The solid-state image sensor includes a pixel array including a plurality of pixel cells, a pixel driving circuit configured to drive the plurality of pixel cells, a readout circuit, and a plurality of readout wires corresponding to respective columns of the pixel cell. Each of the plurality of pixel cells includes an avalanche photodiode configured to detect a photon by avalanche multiplication occurring when one photon enters, and a transfer transistor configured to transfer a detection result of the photon to the corresponding readout wire. The readout circuit determines whether a photon is detected or not, and outputs a determination result.

Claims (32)

1. A solid-state image sensor, comprising:

a pixel array including a plurality of pixel cells;

a pixel driving circuit configured to drive the plurality of pixel cells;

a readout circuit configured to read data from the plurality of pixel cells and output an image constituted by pixels corresponding to the plurality of pixel cells; and

a plurality of readout wires corresponding to respective columns of the pixel cells, the plurality of readout wires connecting the pixel cell and the readout circuit to each other, wherein:

each of the plurality of pixel cells includes:

an avalanche photodiode configured to detect a photon by avalanche multiplication occurring when one photon enters, and

a transfer transistor configured to transfer a detection result of the photon by the avalanche photodiode to a corresponding one of the readout wires,

for each of the plurality of pixel cells of the pixel array, the readout circuit determines whether a photon is detected or not based on a voltage of one of the readout wires corresponding to the pixel cell, and outputs a determination result as a value of a pixel corresponding to the pixel cell, and

the readout circuit includes:

a precharge circuit configured to precharge the readout wires, and

a column amplifier configured to determine whether a photon is detected or not based on a voltage of the readout wire to which the detection result of the photon is transferred, the column amplifier being configured to change the voltage of the readout wire to one of two predetermined voltages corresponding to the determination result and hold the voltage.

2. The solid-state image sensor according to claim 1 , wherein

the readout circuit outputs an address indicating a position of a pixel cell corresponding to the determination result.

3. The solid-state image sensor according to claim 2 , wherein

the readout circuit outputs only the address of the pixel cell for which it is determined that a photon is detected.

4. The solid-state image sensor according to claim 2 , wherein

the readout circuit outputs only the address of the pixel cell for which it is determined that a photon is not detected.

5. The solid-state image sensor according to claim 2 , wherein

in a case where a detection result of a photon for one of the plurality of pixel cells is different from a detection result of a photon for a pixel cell adjacent to the one of the plurality of pixel cells, the readout circuit outputs the address of the one of the plurality of pixel cells.

6. An imaging system comprising:

a light projection device configured to output a train of optical pulses;

a camera configured to receive the train of optical pulses reflected on a subject; and

a controller configured to control the light projection device and the camera, wherein

the camera includes

an imaging optical system,

the solid-state image sensor according to claim 1 configured to receive the train of optical pulses reflected on the subject through the imaging optical system, and outputs images of a plurality of frames corresponding to respective optical pulses in the train of optical pulses, and

a signal processor configured to process an output of the solid-state image sensor,

for each of the plurality of frames, a relationship between a frame number and a time from an output of the optical pulse corresponding to the frame to a light exposure period corresponding to the frame of the solid-state image sensor is set beforehand, and

the signal processor obtains the time based on the frame number.

7. The imaging system according to claim 6 , wherein

the controller controls the number of photons generated per the optical pulse, so that an average of the number of photons, which enter each of the plurality of pixel cells of the solid-state image sensor in the light exposure period, is one.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2021
From: HIROSE, YUTAKA; ODAGAWA, AKIHIRO; KOYAMA, SHINZO
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056997/0274 →
Priority Claims (1)
JP JP2018-167137 · Sep 6, 2018 · national
Continuity (1)
Related Publication 20210368119A1 · Nov 25, 2021
Cited By (1)
US 12,207,008