IP Library › Granted Patent US 11,294,713
Granted Patent B2
US 11,294,713 · App. 16/825,831 · Granted Apr 5, 2022

Asynchronous data movement pipeline

Inventor: Harold Carter Edwards (Campbell, CA)
Assignee: NVIDIA Corporation
G06F9/485G06F9/524G06F9/544
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Quick Facts
Patent No.
US 11,294,713
App. No.
16/825,831
Granted
Apr 5, 2022
Kind
B2
Abstract

Apparatuses, systems, and techniques to parallelize operations in one or more programs with data copies from global memory to shared memory in each of the one or more programs. In at least one embodiment, a program performs operations on shared data and then asynchronously copies shared data to shared memory, and continues performing additional operations in parallel while the shared data is copied to shared memory until an indicator provided by an application programming interface to facilitate parallel computing, such as CUDA, informs said program that shared data has been copied to shared memory.

Claims (55)

1. A machine-readable medium having stored thereon an application programming interface (API), which if performed by one or more processors, cause the one or more processors to at least:

block, based in part on a request to the API to wait until output from one or more second threads is available in shared memory, one or more first instructions of a first thread while processing one or more second instructions of the first thread.

2. The machine-readable medium of claim 1 , wherein:

the output from the one or more second threads is one or more shared data items;

the one or more first instructions of the first thread depend on the one or more shared data items;

the one or more second instructions of the first thread do not depend on the one or more shared data items;

the one or more second instructions of the first thread make a first request to the API to copy one or more additional shared data items to the shared memory; and

the one or more second instructions of the first thread make a second request to the API to wait until the one or more additional shared data items are available in shared memory.

3. The machine-readable medium of claim 2 , wherein the one or more additional shared data items are copied from a first global memory for the first thread and the one or more shared data items are copied from a second global memory for the second thread.

4. The machine-readable medium of claim 2 , wherein the one or more shared data items and the one or more additional shared data items are available in shared memory when each of the one or more shared data items and each of the one or more additional shared data items have been loaded from a global memory and stored into the shared memory.

5. The machine-readable medium of claim 2 , wherein the one or more first instructions of the first thread are performed once an indication is received from the API.

6. The machine-readable medium of claim 5 , wherein the indication is generated by the API based, at least in part, on whether the one or more shared data items have been copied from a global memory and stored into the shared memory.

7. The machine-readable medium of claim 1 , wherein the output from the one or more second threads is available in the shared memory when one or more shared data items have been copied from a global memory and stored into the shared memory.

8. The machine-readable medium of claim 1 , wherein the application programming interface comprises one or more software function calls to perform parallel computing operations by the first thread and the one or more second threads on one or more parallel processing units.

9. A method, comprising:

blocking, based at least in part on a request to an application programming interface (API) to wait until output from one or more second threads is available in shared memory, one or more first instructions of a first thread while processing one or more second instructions of the first thread.

10. The method of claim 9 , wherein:

the output from the one or more second threads is available in the shared memory when one or more first shared data items have been copied to the shared memory by the one or more second threads;

the one or more first instructions of the first thread use the one or more first shared data items when a first indication is generated by the API;

the one or more second instructions of the first thread submit one or more second shared data items to the API to be copied to the shared memory; and

the one or more second instructions of the first thread wait for a second indication to be generated by the API.

11. The method of claim 10 , wherein the first indication is generated by the API when the one or more first shared data items have been loaded from a global memory and stored into the shared memory.

12. The method of claim 10 , wherein the second indication is generated by the API when the one or more second shared data items have been loaded from a global memory and stored into the shared memory.

13. The method of claim 10 , wherein:

the second thread submits one or more third data items to the API to be copied to the shared memory; and

the second thread waits for a third indication generated by the API.

14. The method of claim 13 , wherein the third indication is generated by the API when the one or more third data items have been copied from a global memory to the shared memory.

15. The method of claim 9 , wherein the output from the one or more second threads is available in the shared memory when one or more shared data items have been copied from a global memory and stored into the shared memory.

16. The method of claim 9 , wherein the API comprises one or more software function interfaces that, when invoked by the first thread and the one or more second threads, perform parallel computing operations.

17. A system, comprising:

one or more processors to block, based at least in part on a request to an application programming interface (API) to wait until output from one or more second threads is available in shared memory, one or more first instructions of a first thread while processing one or more second instructions of the first thread.

18. The system of claim 17 , wherein:

the output from the one or more second threads is one or more first shared data items;

the one or more first instructions of the first thread depend on the one or more first shared data items;

the one or more second instructions of the first thread do not depend on the one or more first shared data items;

the one or more second instructions of the first thread make a first request to the API to copy one or more second shared data items to the shared memory; and

the one or more second instructions of the first thread make a second request to the API to wait until the one or more second shared data items are available in shared memory.

19. The system of claim 18 , wherein the one or more second shared data items are copied from a first global memory for the first thread and the one or more first shared data items are copied from a second global memory for the second thread.

20. The system of claim 18 , wherein the one or more first shared data items and the one or more second shared data items are available in shared memory when each of the one or more first shared data items and each of the one or more second shared data items have been loaded from a global memory and stored into the shared memory.

21. The system of claim 17 , wherein the API comprises one or more software function calls to perform parallel computing operations by the first thread and the one or more second threads on one or more parallel processing units.

22. The system of claim 17 , wherein the output from the one or more second threads is available in the shared memory when one or more shared data items have been copied from a global memory and stored into the shared memory.

23. A processor, comprising:

one or more circuits to perform one or more operations that block, based at least in part on a request to an application programming interface (API) to wait until output from one or more second threads is available in shared memory, one or more first instructions of a first thread while processing one or more second instructions of the first thread.

24. The processor of claim 23 , wherein:

the output from the one or more second threads is available in the shared memory when one or more first shared data items have been copied to the shared memory by the one or more second threads;

the one or more second instructions of the first thread submit one or more second shared data items to the API to be copied to the shared memory;

the one or more first instructions of the first thread use the one or more first shared data items when a first indication is generated by the API; and

the one or more second instructions of the first thread wait for a second indication to be generated API.

25. The processor of claim 24 , wherein the first indication is generated by the API when the one or more first shared data items have been loaded from a global memory and stored into the shared memory.

26. The processor of claim 24 , wherein the second indication is generated by the API when the one or more second shared data items have been loaded from a global memory and stored into the shared memory.

27. The processor of claim 24 , wherein:

the second thread submits one or more third shared data items to the API to be copied to shared memory; and

the second thread waits for a third indication from the API, the indication generated when each of the one or more third shared data items have been loaded from a global memory and stored into the shared memory.

28. The processor of claim 23 , wherein the output from the one or more second threads is available in the shared memory when one or more shared data items have been copied from a global memory and stored into the shared memory.

29. The processor of claim 23 , wherein the API comprises one or more software function interfaces that, when invoked by the first thread and the one or more second threads, perform parallel computing operations.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2020
From: EDWARDS, HAROLD CARTER
To: NVIDIA CORPORATION
Reel/Frame 052348/0267 →
Continuity (1)
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