Semiconductor device package and method of manufacturing the same
A package substrate includes a first dielectric layer, a first patterned conductive layer and a first set of alignment marks. The first patterned conductive layer is disposed on the first dielectric layer. The first set of alignment marks is disposed on the first dielectric layer and adjacent to a first edge of the first dielectric layer. The first set of alignment marks includes a plurality of alignment marks. Distances between the alignment marks of the first set of alignment marks and the first edge are different from each other.
1. A method for manufacturing a substrate, comprising:
(a) providing a first dielectric layer and a first set of alignment marks at a first surface of the first dielectric layer, wherein the first dielectric layer has a first edge, and wherein distances between the first set of alignment marks and the first edge of the first dielectric layer vary; and
(b) providing a second dielectric layer over the first dielectric layer and a second set of alignment marks at a first surface of the second dielectric layer, wherein the second dielectric layer has a second edge, and wherein distances between the second set of alignment marks and the second edge of the second dielectric layer vary,
wherein lengths of the first set of alignment marks are in ascending order along a first direction, and lengths of the second set of alignment marks are in ascending order substantially along the first direction.
2. The method of claim 1 , wherein differences between the lengths of any two adjacent alignment marks of the first set of alignment marks are substantially equal.
3. The method of claim 1 , wherein centers of widths of any two adjacent alignment marks of the first set of alignment marks have substantially the same pitch.
4. The method of claim 1 , wherein centers of widths of any two adjacent alignment marks of the second set of alignment marks have substantially the same pitch.
5. The method of claim 1 , further comprising: providing a third set of alignment marks at a second surface of the first dielectric layer, wherein the second surface of the first dielectric layer is opposite to the first surface of the first dielectric layer.
6. The method of claim 5 , wherein lengths of the third set of alignment marks are in ascending order along the first direction.
7. The method of claim 1 , wherein differences between the lengths of any two adjacent alignment marks of the second set of alignment marks are substantially equal.
8. The method of claim 1 , wherein the first set of alignment marks has a first pitch and the second set of alignment marks has a second pitch, wherein the first pitch and the second pitch are substantially equal.
9. A method for manufacturing a substrate, comprising:
(a) providing a first dielectric layer, wherein the first dielectric layer has a first edge and a second edge non-parallel with the first edge;
(b) forming a first set of alignment marks at the first dielectric layer, wherein distances between the first set of alignment marks and the first edge of the first dielectric layer vary; and
(c) forming a second set of alignment marks at the first dielectric layer, wherein distances between the second set of alignment marks and the second edge of the first dielectric layer vary,
wherein lengths of the first set of alignment marks are in ascending order along a first direction, and lengths of the second set of alignment marks are in ascending order along a second direction non-parallel to the first direction.
10. The method of claim 9 , wherein centers of widths of any two adjacent alignment marks of the first set of alignment marks have substantially the same pitch.
11. The method of claim 9 , wherein centers of widths any two adjacent alignment marks of the second set of alignment marks have substantially the same pitch.
12. The method of claim 9 , wherein the first direction is substantially perpendicular to the second direction.
13. A substrate, comprising:
a first dielectric layer having a first edge;
a first set of alignment marks disposed at a first surface of the first dielectric layer, wherein distances between the first set of alignment marks and the first edge of the first dielectric layer vary;
a second dielectric layer over the first set of alignment marks, wherein the second dielectric layer has a second edge; and
a second set of alignment marks disposed at a first surface of the second dielectric layer, wherein distances between the second set of alignment marks and the second edge of the second dielectric layer vary,
wherein lengths of the first set of alignment marks are in ascending order along a first direction, and lengths of the second set of alignment marks are in ascending order substantially along the first direction.
14. The substrate of claim 13 , wherein differences between the lengths of any two adjacent alignment marks of the first set of alignment marks are substantially equal.
15. The substrate of claim 13 , wherein centers of widths of any two adjacent alignment marks of the first set of alignment marks have substantially the same pitch.
16. The substrate of claim 13 , wherein centers of widths of any two adjacent alignment marks of the second set of alignment marks have substantially the same pitch.
17. The substrate of claim 13 , further comprising: a third set of alignment marks disposed at a second surface of the first dielectric layer, wherein the second surface of the first dielectric layer is opposite to the first surface of the first dielectric layer.
18. The substrate of claim 17 , wherein lengths of the third set of alignment marks are in ascending order along the first direction.
19. The substrate of claim 13 , wherein differences between the lengths of any two adjacent alignment marks of the second set of alignment marks are substantially equal.
20. The substrate of claim 13 , wherein the first set of alignment marks has a first pitch and the second set of alignment marks has a second pitch, wherein the first pitch and the second pitch are substantially equal.